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Davinci: gpio - use ioremap()
This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
parent
a6374f5340
commit
b8d4429395
8 changed files with 18 additions and 14 deletions
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@ -1201,7 +1201,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
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.intc_irq_num = DA830_N_CP_INTC_IRQ,
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.timer_info = &da830_timer_info,
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.gpio_type = GPIO_TYPE_DAVINCI,
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.gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
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.gpio_base = DA8XX_GPIO_BASE,
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.gpio_num = 128,
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.gpio_irq = IRQ_DA8XX_GPIO0,
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.serial_dev = &da8xx_serial_device,
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@ -1086,7 +1086,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
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.intc_irq_num = DA850_N_CP_INTC_IRQ,
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.timer_info = &da850_timer_info,
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.gpio_type = GPIO_TYPE_DAVINCI,
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.gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
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.gpio_base = DA8XX_GPIO_BASE,
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.gpio_num = 144,
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.gpio_irq = IRQ_DA8XX_GPIO0,
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.serial_dev = &da8xx_serial_device,
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@ -855,7 +855,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm355_timer_info,
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.gpio_type = GPIO_TYPE_DAVINCI,
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.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
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.gpio_base = DAVINCI_GPIO_BASE,
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.gpio_num = 104,
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.gpio_irq = IRQ_DM355_GPIOBNK0,
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.serial_dev = &dm355_serial_device,
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@ -1060,7 +1060,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm365_timer_info,
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.gpio_type = GPIO_TYPE_DAVINCI,
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.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
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.gpio_base = DAVINCI_GPIO_BASE,
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.gpio_num = 104,
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.gpio_irq = IRQ_DM365_GPIO0,
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.gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */
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@ -746,7 +746,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm644x_timer_info,
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.gpio_type = GPIO_TYPE_DAVINCI,
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.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
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.gpio_base = DAVINCI_GPIO_BASE,
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.gpio_num = 71,
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.gpio_irq = IRQ_GPIOBNK0,
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.serial_dev = &dm644x_serial_device,
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@ -830,7 +830,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm646x_timer_info,
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.gpio_type = GPIO_TYPE_DAVINCI,
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.gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE),
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.gpio_base = DAVINCI_GPIO_BASE,
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.gpio_num = 43, /* Only 33 usable */
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.gpio_irq = IRQ_DM646X_GPIOBNK0,
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.serial_dev = &dm646x_serial_device,
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@ -37,22 +37,22 @@ struct davinci_gpio_regs {
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container_of(chip, struct davinci_gpio_controller, chip)
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static struct davinci_gpio_controller chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
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static void __iomem *gpio_base;
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static struct davinci_gpio_regs __iomem __init *gpio2regs(unsigned gpio)
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{
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void __iomem *ptr;
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void __iomem *base = davinci_soc_info.gpio_base;
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if (gpio < 32 * 1)
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ptr = base + 0x10;
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ptr = gpio_base + 0x10;
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else if (gpio < 32 * 2)
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ptr = base + 0x38;
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ptr = gpio_base + 0x38;
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else if (gpio < 32 * 3)
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ptr = base + 0x60;
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ptr = gpio_base + 0x60;
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else if (gpio < 32 * 4)
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ptr = base + 0x88;
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ptr = gpio_base + 0x88;
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else if (gpio < 32 * 5)
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ptr = base + 0xb0;
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ptr = gpio_base + 0xb0;
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else
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ptr = NULL;
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return ptr;
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@ -157,6 +157,10 @@ static int __init davinci_gpio_setup(void)
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if (WARN_ON(DAVINCI_N_GPIO < ngpio))
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ngpio = DAVINCI_N_GPIO;
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gpio_base = ioremap(soc_info->gpio_base, SZ_4K);
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if (WARN_ON(!gpio_base))
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return -ENOMEM;
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for (i = 0, base = 0; base < ngpio; i++, base += 32) {
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chips[i].chip.label = "DaVinci";
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@ -445,7 +449,7 @@ static int __init davinci_gpio_irq_setup(void)
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/* BINTEN -- per-bank interrupt enable. genirq would also let these
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* bits be set/cleared dynamically.
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*/
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__raw_writel(binten, soc_info->gpio_base + 0x08);
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__raw_writel(binten, gpio_base + 0x08);
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printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
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@ -60,7 +60,7 @@ struct davinci_soc_info {
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unsigned long intc_irq_num;
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struct davinci_timer_info *timer_info;
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int gpio_type;
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void __iomem *gpio_base;
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u32 gpio_base;
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unsigned gpio_num;
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unsigned gpio_irq;
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unsigned gpio_unbanked;
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