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mips: Realtek RTL: select NO_EXCEPT_FILL
The CPUs in these SoCs support MIPS32 R2, and allow ebase relocation. Even if the default exception base of 0x80000000 is used, the MIPS_GENERIC load address of 0x80100000 leaves sufficient space to not need an extra 0x400 bytes of padding. Suggested-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -445,6 +445,7 @@ config LANTIQ
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select IRQ_MIPS_CPU
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select CEVT_R4K
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select CSRC_R4K
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select NO_EXCEPT_FILL
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select SYS_HAS_CPU_MIPS32_R1
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_SUPPORTS_BIG_ENDIAN
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