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drm/i915: More cautious with pch fifo underruns
Apparently PCH fifo underruns are tricky, we have plenty reports that we see the occasional underrun (especially at boot-up). So for a change let's see what happens when we don't re-enable pch fifo underrun reporting when the pipe is disabled. This means that the kernel can't catch pch fifo underruns when they happen (except when all pipes are on on the pch). But we'll still catch underruns when disabling the pipe again. So not a terrible reduction in test coverage. Since the DRM_ERROR is new and hence a regression plan B would be to revert it back to a debug output. Which would be a lot worse than this hack for underrun test coverage in the wild. See the referenced discussions for more. References: http://mid.gmane.org/CA+gsUGRfGe3t4NcjdeA=qXysrhLY3r4CEu7z4bjTwxi1uOfy+g@mail.gmail.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85898 References: https://bugs.freedesktop.org/show_bug.cgi?id=85898 References: https://bugs.freedesktop.org/show_bug.cgi?id=86233 References: https://bugs.freedesktop.org/show_bug.cgi?id=86478 Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Tested-by: lu hua <huax.lu@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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1 changed files with 0 additions and 2 deletions
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@ -4325,7 +4325,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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ironlake_fdi_disable(crtc);
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ironlake_fdi_disable(crtc);
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ironlake_disable_pch_transcoder(dev_priv, pipe);
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ironlake_disable_pch_transcoder(dev_priv, pipe);
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intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
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if (HAS_PCH_CPT(dev)) {
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if (HAS_PCH_CPT(dev)) {
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/* disable TRANS_DP_CTL */
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/* disable TRANS_DP_CTL */
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@ -4389,7 +4388,6 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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if (intel_crtc->config.has_pch_encoder) {
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if (intel_crtc->config.has_pch_encoder) {
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lpt_disable_pch_transcoder(dev_priv);
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lpt_disable_pch_transcoder(dev_priv);
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intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, true);
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intel_ddi_fdi_disable(crtc);
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intel_ddi_fdi_disable(crtc);
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}
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}
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