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hwmon: (ltc2992) Add support
LTC2992 is a rail-to-rail system monitor that measures current, voltage, and power of two supplies. Two ADCs simultaneously measure each supply’s current. A third ADC monitors the input voltages and four auxiliary external voltages. Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Alexandru Tachici
Guenter Roeck
parent
d014538aa3
commit
b0bd407e94
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@ -101,6 +101,7 @@ Hardware Monitoring Kernel Drivers
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lm95234
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lm95245
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lochnagar
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ltc2992
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ltc2945
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ltc2947
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ltc2978
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56
Documentation/hwmon/ltc2992.rst
Normal file
56
Documentation/hwmon/ltc2992.rst
Normal file
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@ -0,0 +1,56 @@
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.. SPDX-License-Identifier: GPL-2.0
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Kernel driver ltc2992
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=====================
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Supported chips:
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* Linear Technology LTC2992
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Prefix: 'ltc2992'
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Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf
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Author: Alexandru Tachici <alexandru.tachici@analog.com>
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Description
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-----------
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This driver supports hardware monitoring for Linear Technology LTC2992 power monitor.
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LTC2992 is a rail-to-rail system monitor that measures current,
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voltage, and power of two supplies.
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Two ADCs simultaneously measure each supply’s current. A third ADC monitors
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the input voltages and four auxiliary external voltages.
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Sysfs entries
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-------------
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The following attributes are supported. Limits are read-write,
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all other attributes are read-only.
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in_reset_history Reset all highest/lowest values.
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inX_input Measured voltage.
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inX_lowest Minimum measured voltage.
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inX_highest Maximum measured voltage.
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inX_min Minimum voltage allowed.
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inX_max Maximum voltage allowed.
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inX_min_alarm An undervoltage occurred. Cleared on read.
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inX_max_alarm An overvoltage occurred. Cleared on read.
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currX_input Measured current.
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currX_lowest Minimum measured current.
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currX_highest Maximum measured current.
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currX_min Minimum current allowed.
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currX_max Maximum current allowed.
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currX_min_alarm An undercurrent occurred. Cleared on read.
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currX_max_alarm An overcurrent occurred. Cleared on read.
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powerX_input Measured power.
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powerX_input_lowest Minimum measured voltage.
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powerX_input_highest Maximum measured voltage.
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powerX_min Minimum power.
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powerX_max Maximum power.
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powerX_min_alarm An underpower occurred. Cleared on read.
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powerX_max_alarm An overpower occurred. Cleared on read.
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@ -871,6 +871,17 @@ config SENSORS_LTC2990
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This driver can also be built as a module. If so, the module will
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be called ltc2990.
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config SENSORS_LTC2992
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tristate "Linear Technology LTC2992"
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depends on I2C
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help
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If you say yes here you get support for Linear Technology LTC2992
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I2C System Monitor. The LTC2992 measures current, voltage, and
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power of two supplies.
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This driver can also be built as a module. If so, the module will
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be called ltc2992.
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config SENSORS_LTC4151
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tristate "Linear Technology LTC4151"
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depends on I2C
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@ -119,6 +119,7 @@ obj-$(CONFIG_SENSORS_LTC2947) += ltc2947-core.o
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obj-$(CONFIG_SENSORS_LTC2947_I2C) += ltc2947-i2c.o
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obj-$(CONFIG_SENSORS_LTC2947_SPI) += ltc2947-spi.o
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obj-$(CONFIG_SENSORS_LTC2990) += ltc2990.o
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obj-$(CONFIG_SENSORS_LTC2992) += ltc2992.o
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obj-$(CONFIG_SENSORS_LTC4151) += ltc4151.o
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obj-$(CONFIG_SENSORS_LTC4215) += ltc4215.o
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obj-$(CONFIG_SENSORS_LTC4222) += ltc4222.o
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813
drivers/hwmon/ltc2992.c
Normal file
813
drivers/hwmon/ltc2992.c
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@ -0,0 +1,813 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* LTC2992 - Dual Wide Range Power Monitor
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*
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* Copyright 2020 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#define LTC2992_CTRLB 0x01
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#define LTC2992_FAULT1 0x03
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#define LTC2992_POWER1 0x05
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#define LTC2992_POWER1_MAX 0x08
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#define LTC2992_POWER1_MIN 0x0B
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#define LTC2992_POWER1_MAX_THRESH 0x0E
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#define LTC2992_POWER1_MIN_THRESH 0x11
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#define LTC2992_DSENSE1 0x14
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#define LTC2992_DSENSE1_MAX 0x16
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#define LTC2992_DSENSE1_MIN 0x18
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#define LTC2992_DSENSE1_MAX_THRESH 0x1A
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#define LTC2992_DSENSE1_MIN_THRESH 0x1C
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#define LTC2992_SENSE1 0x1E
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#define LTC2992_SENSE1_MAX 0x20
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#define LTC2992_SENSE1_MIN 0x22
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#define LTC2992_SENSE1_MAX_THRESH 0x24
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#define LTC2992_SENSE1_MIN_THRESH 0x26
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#define LTC2992_G1 0x28
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#define LTC2992_G1_MAX 0x2A
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#define LTC2992_G1_MIN 0x2C
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#define LTC2992_G1_MAX_THRESH 0x2E
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#define LTC2992_G1_MIN_THRESH 0x30
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#define LTC2992_FAULT2 0x35
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#define LTC2992_G2 0x5A
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#define LTC2992_G2_MAX 0x5C
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#define LTC2992_G2_MIN 0x5E
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#define LTC2992_G2_MAX_THRESH 0x60
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#define LTC2992_G2_MIN_THRESH 0x62
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#define LTC2992_G3 0x64
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#define LTC2992_G3_MAX 0x66
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#define LTC2992_G3_MIN 0x68
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#define LTC2992_G3_MAX_THRESH 0x6A
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#define LTC2992_G3_MIN_THRESH 0x6C
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#define LTC2992_G4 0x6E
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#define LTC2992_G4_MAX 0x70
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#define LTC2992_G4_MIN 0x72
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#define LTC2992_G4_MAX_THRESH 0x74
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#define LTC2992_G4_MIN_THRESH 0x76
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#define LTC2992_FAULT3 0x92
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#define LTC2992_POWER(x) (LTC2992_POWER1 + ((x) * 0x32))
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#define LTC2992_POWER_MAX(x) (LTC2992_POWER1_MAX + ((x) * 0x32))
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#define LTC2992_POWER_MIN(x) (LTC2992_POWER1_MIN + ((x) * 0x32))
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#define LTC2992_POWER_MAX_THRESH(x) (LTC2992_POWER1_MAX_THRESH + ((x) * 0x32))
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#define LTC2992_POWER_MIN_THRESH(x) (LTC2992_POWER1_MIN_THRESH + ((x) * 0x32))
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#define LTC2992_DSENSE(x) (LTC2992_DSENSE1 + ((x) * 0x32))
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#define LTC2992_DSENSE_MAX(x) (LTC2992_DSENSE1_MAX + ((x) * 0x32))
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#define LTC2992_DSENSE_MIN(x) (LTC2992_DSENSE1_MIN + ((x) * 0x32))
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#define LTC2992_DSENSE_MAX_THRESH(x) (LTC2992_DSENSE1_MAX_THRESH + ((x) * 0x32))
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#define LTC2992_DSENSE_MIN_THRESH(x) (LTC2992_DSENSE1_MIN_THRESH + ((x) * 0x32))
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#define LTC2992_SENSE(x) (LTC2992_SENSE1 + ((x) * 0x32))
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#define LTC2992_SENSE_MAX(x) (LTC2992_SENSE1_MAX + ((x) * 0x32))
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#define LTC2992_SENSE_MIN(x) (LTC2992_SENSE1_MIN + ((x) * 0x32))
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#define LTC2992_SENSE_MAX_THRESH(x) (LTC2992_SENSE1_MAX_THRESH + ((x) * 0x32))
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#define LTC2992_SENSE_MIN_THRESH(x) (LTC2992_SENSE1_MIN_THRESH + ((x) * 0x32))
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#define LTC2992_POWER_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
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#define LTC2992_SENSE_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
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#define LTC2992_DSENSE_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
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/* CTRLB register bitfields */
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#define LTC2992_RESET_HISTORY BIT(3)
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/* FAULT1 FAULT2 registers common bitfields */
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#define LTC2992_POWER_FAULT_MSK(x) (BIT(6) << (x))
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#define LTC2992_DSENSE_FAULT_MSK(x) (BIT(4) << (x))
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#define LTC2992_SENSE_FAULT_MSK(x) (BIT(2) << (x))
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/* FAULT1 bitfields */
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#define LTC2992_GPIO1_FAULT_MSK(x) (BIT(0) << (x))
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/* FAULT2 bitfields */
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#define LTC2992_GPIO2_FAULT_MSK(x) (BIT(0) << (x))
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/* FAULT3 bitfields */
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#define LTC2992_GPIO3_FAULT_MSK(x) (BIT(6) << (x))
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#define LTC2992_GPIO4_FAULT_MSK(x) (BIT(4) << (x))
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#define LTC2992_IADC_NANOV_LSB 12500
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#define LTC2992_VADC_UV_LSB 25000
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#define LTC2992_VADC_GPIO_UV_LSB 500
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struct ltc2992_state {
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struct i2c_client *client;
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struct regmap *regmap;
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u32 r_sense_uohm[2];
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};
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struct ltc2992_gpio_regs {
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u8 data;
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u8 max;
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u8 min;
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u8 max_thresh;
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u8 min_thresh;
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u8 alarm;
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u8 min_alarm_msk;
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u8 max_alarm_msk;
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};
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static const struct ltc2992_gpio_regs ltc2992_gpio_addr_map[] = {
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{
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.data = LTC2992_G1,
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.max = LTC2992_G1_MAX,
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.min = LTC2992_G1_MIN,
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.max_thresh = LTC2992_G1_MAX_THRESH,
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.min_thresh = LTC2992_G1_MIN_THRESH,
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.alarm = LTC2992_FAULT1,
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.min_alarm_msk = LTC2992_GPIO1_FAULT_MSK(0),
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.max_alarm_msk = LTC2992_GPIO1_FAULT_MSK(1),
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},
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{
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.data = LTC2992_G2,
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.max = LTC2992_G2_MAX,
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.min = LTC2992_G2_MIN,
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.max_thresh = LTC2992_G2_MAX_THRESH,
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.min_thresh = LTC2992_G2_MIN_THRESH,
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.alarm = LTC2992_FAULT2,
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.min_alarm_msk = LTC2992_GPIO2_FAULT_MSK(0),
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.max_alarm_msk = LTC2992_GPIO2_FAULT_MSK(1),
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},
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{
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.data = LTC2992_G3,
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.max = LTC2992_G3_MAX,
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.min = LTC2992_G3_MIN,
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.max_thresh = LTC2992_G3_MAX_THRESH,
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.min_thresh = LTC2992_G3_MIN_THRESH,
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.alarm = LTC2992_FAULT3,
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.min_alarm_msk = LTC2992_GPIO3_FAULT_MSK(0),
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.max_alarm_msk = LTC2992_GPIO3_FAULT_MSK(1),
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},
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{
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.data = LTC2992_G4,
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.max = LTC2992_G4_MAX,
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.min = LTC2992_G4_MIN,
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.max_thresh = LTC2992_G4_MAX_THRESH,
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.min_thresh = LTC2992_G4_MIN_THRESH,
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.alarm = LTC2992_FAULT3,
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.min_alarm_msk = LTC2992_GPIO4_FAULT_MSK(0),
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.max_alarm_msk = LTC2992_GPIO4_FAULT_MSK(1),
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},
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};
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static int ltc2992_read_reg(struct ltc2992_state *st, u8 addr, const u8 reg_len)
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{
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u8 regvals[4];
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int ret;
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int val;
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int i;
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ret = regmap_bulk_read(st->regmap, addr, regvals, reg_len);
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if (ret < 0)
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return ret;
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val = 0;
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for (i = 0; i < reg_len; i++)
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val |= regvals[reg_len - i - 1] << (i * 8);
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return val;
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}
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static int ltc2992_write_reg(struct ltc2992_state *st, u8 addr, const u8 reg_len, u32 val)
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{
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u8 regvals[4];
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int i;
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for (i = 0; i < reg_len; i++)
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regvals[reg_len - i - 1] = (val >> (i * 8)) & 0xFF;
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return regmap_bulk_write(st->regmap, addr, regvals, reg_len);
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}
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static umode_t ltc2992_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
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int channel)
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{
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const struct ltc2992_state *st = data;
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switch (type) {
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case hwmon_chip:
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switch (attr) {
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case hwmon_chip_in_reset_history:
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return 0200;
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}
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break;
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case hwmon_in:
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switch (attr) {
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case hwmon_in_input:
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case hwmon_in_lowest:
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case hwmon_in_highest:
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case hwmon_in_min_alarm:
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case hwmon_in_max_alarm:
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return 0444;
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case hwmon_in_min:
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case hwmon_in_max:
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return 0644;
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}
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break;
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case hwmon_curr:
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switch (attr) {
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case hwmon_curr_input:
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case hwmon_curr_lowest:
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case hwmon_curr_highest:
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case hwmon_curr_min_alarm:
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case hwmon_curr_max_alarm:
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if (st->r_sense_uohm[channel])
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return 0444;
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break;
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case hwmon_curr_min:
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case hwmon_curr_max:
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if (st->r_sense_uohm[channel])
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return 0644;
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break;
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}
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break;
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case hwmon_power:
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switch (attr) {
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case hwmon_power_input:
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case hwmon_power_input_lowest:
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case hwmon_power_input_highest:
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case hwmon_power_min_alarm:
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case hwmon_power_max_alarm:
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if (st->r_sense_uohm[channel])
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return 0444;
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break;
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case hwmon_power_min:
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case hwmon_power_max:
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if (st->r_sense_uohm[channel])
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return 0644;
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break;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static int ltc2992_get_voltage(struct ltc2992_state *st, u32 reg, u32 scale, long *val)
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{
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int reg_val;
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reg_val = ltc2992_read_reg(st, reg, 2);
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if (reg_val < 0)
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return reg_val;
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reg_val = reg_val >> 4;
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*val = DIV_ROUND_CLOSEST(reg_val * scale, 1000);
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return 0;
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}
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static int ltc2992_set_voltage(struct ltc2992_state *st, u32 reg, u32 scale, long val)
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{
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val = DIV_ROUND_CLOSEST(val * 1000, scale);
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val = val << 4;
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return ltc2992_write_reg(st, reg, 2, val);
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}
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static int ltc2992_read_gpio_alarm(struct ltc2992_state *st, int nr_gpio, u32 attr, long *val)
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{
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int reg_val;
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u32 mask;
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if (attr == hwmon_in_max_alarm)
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mask = ltc2992_gpio_addr_map[nr_gpio].max_alarm_msk;
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else
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mask = ltc2992_gpio_addr_map[nr_gpio].min_alarm_msk;
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reg_val = ltc2992_read_reg(st, ltc2992_gpio_addr_map[nr_gpio].alarm, 1);
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if (reg_val < 0)
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return reg_val;
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*val = !!(reg_val & mask);
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reg_val &= ~mask;
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return ltc2992_write_reg(st, ltc2992_gpio_addr_map[nr_gpio].alarm, 1, reg_val);
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}
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static int ltc2992_read_gpios_in(struct device *dev, u32 attr, int nr_gpio, long *val)
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{
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struct ltc2992_state *st = dev_get_drvdata(dev);
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u32 reg;
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switch (attr) {
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case hwmon_in_input:
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reg = ltc2992_gpio_addr_map[nr_gpio].data;
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break;
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case hwmon_in_lowest:
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reg = ltc2992_gpio_addr_map[nr_gpio].min;
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break;
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case hwmon_in_highest:
|
||||
reg = ltc2992_gpio_addr_map[nr_gpio].max;
|
||||
break;
|
||||
case hwmon_in_min:
|
||||
reg = ltc2992_gpio_addr_map[nr_gpio].min_thresh;
|
||||
break;
|
||||
case hwmon_in_max:
|
||||
reg = ltc2992_gpio_addr_map[nr_gpio].max_thresh;
|
||||
break;
|
||||
case hwmon_in_min_alarm:
|
||||
case hwmon_in_max_alarm:
|
||||
return ltc2992_read_gpio_alarm(st, nr_gpio, attr, val);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_get_voltage(st, reg, LTC2992_VADC_GPIO_UV_LSB, val);
|
||||
}
|
||||
|
||||
static int ltc2992_read_in_alarm(struct ltc2992_state *st, int channel, long *val, u32 attr)
|
||||
{
|
||||
u32 reg_val;
|
||||
u32 mask;
|
||||
|
||||
if (attr == hwmon_in_max_alarm)
|
||||
mask = LTC2992_SENSE_FAULT_MSK(1);
|
||||
else
|
||||
mask = LTC2992_SENSE_FAULT_MSK(0);
|
||||
|
||||
reg_val = ltc2992_read_reg(st, LTC2992_SENSE_FAULT(channel), 1);
|
||||
if (reg_val < 0)
|
||||
return reg_val;
|
||||
|
||||
*val = !!(reg_val & mask);
|
||||
reg_val &= ~mask;
|
||||
|
||||
return ltc2992_write_reg(st, LTC2992_SENSE_FAULT(channel), 1, reg_val);
|
||||
}
|
||||
|
||||
static int ltc2992_read_in(struct device *dev, u32 attr, int channel, long *val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
if (channel > 1)
|
||||
return ltc2992_read_gpios_in(dev, attr, channel - 2, val);
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_in_input:
|
||||
reg = LTC2992_SENSE(channel);
|
||||
break;
|
||||
case hwmon_in_lowest:
|
||||
reg = LTC2992_SENSE_MIN(channel);
|
||||
break;
|
||||
case hwmon_in_highest:
|
||||
reg = LTC2992_SENSE_MAX(channel);
|
||||
break;
|
||||
case hwmon_in_min:
|
||||
reg = LTC2992_SENSE_MIN_THRESH(channel);
|
||||
break;
|
||||
case hwmon_in_max:
|
||||
reg = LTC2992_SENSE_MAX_THRESH(channel);
|
||||
break;
|
||||
case hwmon_in_min_alarm:
|
||||
case hwmon_in_max_alarm:
|
||||
return ltc2992_read_in_alarm(st, channel, val, attr);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_get_voltage(st, reg, LTC2992_VADC_UV_LSB, val);
|
||||
}
|
||||
|
||||
static int ltc2992_get_current(struct ltc2992_state *st, u32 reg, u32 channel, long *val)
|
||||
{
|
||||
u32 reg_val;
|
||||
|
||||
reg_val = ltc2992_read_reg(st, reg, 2);
|
||||
if (reg_val < 0)
|
||||
return reg_val;
|
||||
|
||||
reg_val = reg_val >> 4;
|
||||
*val = DIV_ROUND_CLOSEST(reg_val * LTC2992_IADC_NANOV_LSB, st->r_sense_uohm[channel]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ltc2992_set_current(struct ltc2992_state *st, u32 reg, u32 channel, long val)
|
||||
{
|
||||
u32 reg_val;
|
||||
|
||||
reg_val = DIV_ROUND_CLOSEST(val * st->r_sense_uohm[channel], LTC2992_IADC_NANOV_LSB);
|
||||
reg_val = reg_val << 4;
|
||||
|
||||
return ltc2992_write_reg(st, reg, 2, reg_val);
|
||||
}
|
||||
|
||||
static int ltc2992_read_curr_alarm(struct ltc2992_state *st, int channel, long *val, u32 attr)
|
||||
{
|
||||
u32 reg_val;
|
||||
u32 mask;
|
||||
|
||||
if (attr == hwmon_curr_max_alarm)
|
||||
mask = LTC2992_DSENSE_FAULT_MSK(1);
|
||||
else
|
||||
mask = LTC2992_DSENSE_FAULT_MSK(0);
|
||||
|
||||
reg_val = ltc2992_read_reg(st, LTC2992_DSENSE_FAULT(channel), 1);
|
||||
if (reg_val < 0)
|
||||
return reg_val;
|
||||
|
||||
*val = !!(reg_val & mask);
|
||||
|
||||
reg_val &= ~mask;
|
||||
return ltc2992_write_reg(st, LTC2992_DSENSE_FAULT(channel), 1, reg_val);
|
||||
}
|
||||
|
||||
static int ltc2992_read_curr(struct device *dev, u32 attr, int channel, long *val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_curr_input:
|
||||
reg = LTC2992_DSENSE(channel);
|
||||
break;
|
||||
case hwmon_curr_lowest:
|
||||
reg = LTC2992_DSENSE_MIN(channel);
|
||||
break;
|
||||
case hwmon_curr_highest:
|
||||
reg = LTC2992_DSENSE_MAX(channel);
|
||||
break;
|
||||
case hwmon_curr_min:
|
||||
reg = LTC2992_DSENSE_MIN_THRESH(channel);
|
||||
break;
|
||||
case hwmon_curr_max:
|
||||
reg = LTC2992_DSENSE_MAX_THRESH(channel);
|
||||
break;
|
||||
case hwmon_curr_min_alarm:
|
||||
case hwmon_curr_max_alarm:
|
||||
return ltc2992_read_curr_alarm(st, channel, val, attr);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_get_current(st, reg, channel, val);
|
||||
}
|
||||
|
||||
static int ltc2992_get_power(struct ltc2992_state *st, u32 reg, u32 channel, long *val)
|
||||
{
|
||||
u32 reg_val;
|
||||
|
||||
reg_val = ltc2992_read_reg(st, reg, 3);
|
||||
if (reg_val < 0)
|
||||
return reg_val;
|
||||
|
||||
*val = mul_u64_u32_div(reg_val, LTC2992_VADC_UV_LSB * LTC2992_IADC_NANOV_LSB,
|
||||
st->r_sense_uohm[channel] * 1000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ltc2992_set_power(struct ltc2992_state *st, u32 reg, u32 channel, long val)
|
||||
{
|
||||
u32 reg_val;
|
||||
|
||||
reg_val = mul_u64_u32_div(val, st->r_sense_uohm[channel] * 1000,
|
||||
LTC2992_VADC_UV_LSB * LTC2992_IADC_NANOV_LSB);
|
||||
|
||||
return ltc2992_write_reg(st, reg, 3, reg_val);
|
||||
}
|
||||
|
||||
static int ltc2992_read_power_alarm(struct ltc2992_state *st, int channel, long *val, u32 attr)
|
||||
{
|
||||
u32 reg_val;
|
||||
u32 mask;
|
||||
|
||||
if (attr == hwmon_power_max_alarm)
|
||||
mask = LTC2992_POWER_FAULT_MSK(1);
|
||||
else
|
||||
mask = LTC2992_POWER_FAULT_MSK(0);
|
||||
|
||||
reg_val = ltc2992_read_reg(st, LTC2992_POWER_FAULT(channel), 1);
|
||||
if (reg_val < 0)
|
||||
return reg_val;
|
||||
|
||||
*val = !!(reg_val & mask);
|
||||
reg_val &= ~mask;
|
||||
|
||||
return ltc2992_write_reg(st, LTC2992_POWER_FAULT(channel), 1, reg_val);
|
||||
}
|
||||
|
||||
static int ltc2992_read_power(struct device *dev, u32 attr, int channel, long *val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_power_input:
|
||||
reg = LTC2992_POWER(channel);
|
||||
break;
|
||||
case hwmon_power_input_lowest:
|
||||
reg = LTC2992_POWER_MIN(channel);
|
||||
break;
|
||||
case hwmon_power_input_highest:
|
||||
reg = LTC2992_POWER_MAX(channel);
|
||||
break;
|
||||
case hwmon_power_min:
|
||||
reg = LTC2992_POWER_MIN_THRESH(channel);
|
||||
break;
|
||||
case hwmon_power_max:
|
||||
reg = LTC2992_POWER_MAX_THRESH(channel);
|
||||
break;
|
||||
case hwmon_power_min_alarm:
|
||||
case hwmon_power_max_alarm:
|
||||
return ltc2992_read_power_alarm(st, channel, val, attr);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_get_power(st, reg, channel, val);
|
||||
}
|
||||
|
||||
static int ltc2992_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
|
||||
long *val)
|
||||
{
|
||||
switch (type) {
|
||||
case hwmon_in:
|
||||
return ltc2992_read_in(dev, attr, channel, val);
|
||||
case hwmon_curr:
|
||||
return ltc2992_read_curr(dev, attr, channel, val);
|
||||
case hwmon_power:
|
||||
return ltc2992_read_power(dev, attr, channel, val);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static int ltc2992_write_curr(struct device *dev, u32 attr, int channel, long val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_curr_min:
|
||||
reg = LTC2992_DSENSE_MIN_THRESH(channel);
|
||||
break;
|
||||
case hwmon_curr_max:
|
||||
reg = LTC2992_DSENSE_MAX_THRESH(channel);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_set_current(st, reg, channel, val);
|
||||
}
|
||||
|
||||
static int ltc2992_write_gpios_in(struct device *dev, u32 attr, int nr_gpio, long val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_in_min:
|
||||
reg = ltc2992_gpio_addr_map[nr_gpio].min_thresh;
|
||||
break;
|
||||
case hwmon_in_max:
|
||||
reg = ltc2992_gpio_addr_map[nr_gpio].max_thresh;
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_set_voltage(st, reg, LTC2992_VADC_GPIO_UV_LSB, val);
|
||||
}
|
||||
|
||||
static int ltc2992_write_in(struct device *dev, u32 attr, int channel, long val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
if (channel > 1)
|
||||
return ltc2992_write_gpios_in(dev, attr, channel - 2, val);
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_in_min:
|
||||
reg = LTC2992_SENSE_MIN_THRESH(channel);
|
||||
break;
|
||||
case hwmon_in_max:
|
||||
reg = LTC2992_SENSE_MAX_THRESH(channel);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_set_voltage(st, reg, LTC2992_VADC_UV_LSB, val);
|
||||
}
|
||||
|
||||
static int ltc2992_write_power(struct device *dev, u32 attr, int channel, long val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
u32 reg;
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_power_min:
|
||||
reg = LTC2992_POWER_MIN_THRESH(channel);
|
||||
break;
|
||||
case hwmon_power_max:
|
||||
reg = LTC2992_POWER_MAX_THRESH(channel);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ltc2992_set_power(st, reg, channel, val);
|
||||
}
|
||||
|
||||
static int ltc2992_write_chip(struct device *dev, u32 attr, int channel, long val)
|
||||
{
|
||||
struct ltc2992_state *st = dev_get_drvdata(dev);
|
||||
|
||||
switch (attr) {
|
||||
case hwmon_chip_in_reset_history:
|
||||
return regmap_update_bits(st->regmap, LTC2992_CTRLB, LTC2992_RESET_HISTORY,
|
||||
LTC2992_RESET_HISTORY);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static int ltc2992_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
|
||||
long val)
|
||||
{
|
||||
switch (type) {
|
||||
case hwmon_chip:
|
||||
return ltc2992_write_chip(dev, attr, channel, val);
|
||||
case hwmon_in:
|
||||
return ltc2992_write_in(dev, attr, channel, val);
|
||||
case hwmon_curr:
|
||||
return ltc2992_write_curr(dev, attr, channel, val);
|
||||
case hwmon_power:
|
||||
return ltc2992_write_power(dev, attr, channel, val);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct hwmon_ops ltc2992_hwmon_ops = {
|
||||
.is_visible = ltc2992_is_visible,
|
||||
.read = ltc2992_read,
|
||||
.write = ltc2992_write,
|
||||
};
|
||||
|
||||
static const u32 ltc2992_chip_config[] = {
|
||||
HWMON_C_IN_RESET_HISTORY,
|
||||
0
|
||||
};
|
||||
|
||||
static const struct hwmon_channel_info ltc2992_chip = {
|
||||
.type = hwmon_chip,
|
||||
.config = ltc2992_chip_config,
|
||||
};
|
||||
|
||||
static const u32 ltc2992_in_config[] = {
|
||||
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN | HWMON_I_MAX |
|
||||
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
|
||||
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN | HWMON_I_MAX |
|
||||
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
|
||||
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN | HWMON_I_MAX |
|
||||
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
|
||||
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN | HWMON_I_MAX |
|
||||
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
|
||||
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN | HWMON_I_MAX |
|
||||
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
|
||||
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN | HWMON_I_MAX |
|
||||
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
|
||||
0
|
||||
};
|
||||
|
||||
static const struct hwmon_channel_info ltc2992_in = {
|
||||
.type = hwmon_in,
|
||||
.config = ltc2992_in_config,
|
||||
};
|
||||
|
||||
static const u32 ltc2992_curr_config[] = {
|
||||
HWMON_C_INPUT | HWMON_C_LOWEST | HWMON_C_HIGHEST | HWMON_C_MIN | HWMON_C_MAX |
|
||||
HWMON_C_MIN_ALARM | HWMON_C_MAX_ALARM,
|
||||
HWMON_C_INPUT | HWMON_C_LOWEST | HWMON_C_HIGHEST | HWMON_C_MIN | HWMON_C_MAX |
|
||||
HWMON_C_MIN_ALARM | HWMON_C_MAX_ALARM,
|
||||
0
|
||||
};
|
||||
|
||||
static const struct hwmon_channel_info ltc2992_curr = {
|
||||
.type = hwmon_curr,
|
||||
.config = ltc2992_curr_config,
|
||||
};
|
||||
|
||||
static const u32 ltc2992_power_config[] = {
|
||||
HWMON_P_INPUT | HWMON_P_INPUT_LOWEST | HWMON_P_INPUT_HIGHEST | HWMON_P_MIN | HWMON_P_MAX |
|
||||
HWMON_P_MIN_ALARM | HWMON_P_MAX_ALARM,
|
||||
HWMON_P_INPUT | HWMON_P_INPUT_LOWEST | HWMON_P_INPUT_HIGHEST | HWMON_P_MIN | HWMON_P_MAX |
|
||||
HWMON_P_MIN_ALARM | HWMON_P_MAX_ALARM,
|
||||
0
|
||||
};
|
||||
|
||||
static const struct hwmon_channel_info ltc2992_power = {
|
||||
.type = hwmon_power,
|
||||
.config = ltc2992_power_config,
|
||||
};
|
||||
|
||||
static const struct hwmon_channel_info *ltc2992_info[] = {
|
||||
<c2992_chip,
|
||||
<c2992_in,
|
||||
<c2992_curr,
|
||||
<c2992_power,
|
||||
NULL
|
||||
};
|
||||
|
||||
static const struct hwmon_chip_info ltc2992_chip_info = {
|
||||
.ops = <c2992_hwmon_ops,
|
||||
.info = ltc2992_info,
|
||||
};
|
||||
|
||||
static const struct regmap_config ltc2992_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = 0xE8,
|
||||
};
|
||||
|
||||
static int ltc2992_parse_dt(struct ltc2992_state *st)
|
||||
{
|
||||
struct fwnode_handle *fwnode;
|
||||
struct fwnode_handle *child;
|
||||
u32 addr;
|
||||
u32 val;
|
||||
int ret;
|
||||
|
||||
fwnode = dev_fwnode(&st->client->dev);
|
||||
|
||||
fwnode_for_each_available_child_node(fwnode, child) {
|
||||
ret = fwnode_property_read_u32(child, "reg", &addr);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (addr > 1)
|
||||
return -EINVAL;
|
||||
|
||||
ret = fwnode_property_read_u32(child, "shunt-resistor-micro-ohms", &val);
|
||||
if (!ret)
|
||||
st->r_sense_uohm[addr] = val;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ltc2992_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
|
||||
{
|
||||
struct device *hwmon_dev;
|
||||
struct ltc2992_state *st;
|
||||
int ret;
|
||||
|
||||
st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
|
||||
if (!st)
|
||||
return -ENOMEM;
|
||||
|
||||
st->client = client;
|
||||
st->regmap = devm_regmap_init_i2c(client, <c2992_regmap_config);
|
||||
if (IS_ERR(st->regmap))
|
||||
return PTR_ERR(st->regmap);
|
||||
|
||||
ret = ltc2992_parse_dt(st);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, client->name, st,
|
||||
<c2992_chip_info, NULL);
|
||||
|
||||
return PTR_ERR_OR_ZERO(hwmon_dev);
|
||||
}
|
||||
|
||||
static const struct of_device_id ltc2992_of_match[] = {
|
||||
{ .compatible = "adi,ltc2992" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ltc2992_of_match);
|
||||
|
||||
static const struct i2c_device_id ltc2992_i2c_id[] = {
|
||||
{"ltc2992", 0},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, ltc2992_i2c_id);
|
||||
|
||||
static struct i2c_driver ltc2992_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "ltc2992",
|
||||
.of_match_table = ltc2992_of_match,
|
||||
},
|
||||
.probe = ltc2992_i2c_probe,
|
||||
.id_table = ltc2992_i2c_id,
|
||||
};
|
||||
|
||||
module_i2c_driver(ltc2992_i2c_driver);
|
||||
|
||||
MODULE_AUTHOR("Alexandru Tachici <alexandru.tachici@analog.com>");
|
||||
MODULE_DESCRIPTION("Hwmon driver for Linear Technology 2992");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
Loading…
Reference in a new issue