bcma: add support for 1 and 2 byte extended config space access

The sanity checks allow 1 and 2 byte reads/writes of the extended
PCI config space to proceed; however, the code only supports 4
byte reads/writes.  This patch adds support for 1 and 2 byte
reads/writes of the extended PCI config space.

Signed-off-by: Nathan Hintz <nlhintz@hotmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Nathan Hintz 2013-01-12 02:46:16 -08:00 committed by John W. Linville
parent 447d7e25be
commit b09e9abd09

View file

@ -101,7 +101,7 @@ static int bcma_extpci_read_config(struct bcma_drv_pci *pc, unsigned int dev,
*/ */
if (off >= PCI_CONFIG_SPACE_SIZE) { if (off >= PCI_CONFIG_SPACE_SIZE) {
addr = (func << 12); addr = (func << 12);
addr |= (off & 0x0FFF); addr |= (off & 0x0FFC);
val = bcma_pcie_read_config(pc, addr); val = bcma_pcie_read_config(pc, addr);
} else { } else {
addr = BCMA_CORE_PCI_PCICFG0; addr = BCMA_CORE_PCI_PCICFG0;
@ -164,7 +164,11 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
/* accesses to config registers with offsets >= 256 /* accesses to config registers with offsets >= 256
* requires indirect access. * requires indirect access.
*/ */
if (off < PCI_CONFIG_SPACE_SIZE) { if (off >= PCI_CONFIG_SPACE_SIZE) {
addr = (func << 12);
addr |= (off & 0x0FFC);
val = bcma_pcie_read_config(pc, addr);
} else {
addr = BCMA_CORE_PCI_PCICFG0; addr = BCMA_CORE_PCI_PCICFG0;
addr |= (func << 8); addr |= (func << 8);
addr |= (off & 0xfc); addr |= (off & 0xfc);
@ -202,13 +206,10 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
/* accesses to config registers with offsets >= 256 /* accesses to config registers with offsets >= 256
* requires indirect access. * requires indirect access.
*/ */
if (off >= PCI_CONFIG_SPACE_SIZE) { if (off >= PCI_CONFIG_SPACE_SIZE)
addr = (func << 12);
addr |= (off & 0x0FFF);
bcma_pcie_write_config(pc, addr, val); bcma_pcie_write_config(pc, addr, val);
} else { else
pcicore_write32(pc, addr, val); pcicore_write32(pc, addr, val);
}
} else { } else {
writel(val, mmio); writel(val, mmio);