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cnic, bnx2x: Add CNIC_DRV_STATE_HANDLES_IRQ to ethdev->drv_state
In INTA mode, cnic and bnx2x share the same IRQ. During chip reset, for example, cnic will stop servicing IRQs after it has shutdown the cnic hardware resources. However, the shared IRQ is still active as bnx2x needs to finish the reset. There is a window when bnx2x does not know that cnic is no longer handling IRQ and things don't always work properly. Add a flag to tell bnx2x that cnic is handling IRQ. The flag is set before the first cnic IRQ is expected and cleared when no more cnic IRQs are expected, so there should be no race conditions. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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580d9d0813
commit
ad9b4359c7
3 changed files with 11 additions and 8 deletions
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@ -1875,14 +1875,12 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance)
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if (status & (mask | 0x1)) {
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if (status & (mask | 0x1)) {
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struct cnic_ops *c_ops = NULL;
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struct cnic_ops *c_ops = NULL;
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if (likely(bp->state == BNX2X_STATE_OPEN)) {
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rcu_read_lock();
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rcu_read_lock();
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c_ops = rcu_dereference(bp->cnic_ops);
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c_ops = rcu_dereference(bp->cnic_ops);
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if (c_ops)
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if (c_ops && (bp->cnic_eth_dev.drv_state &
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c_ops->cnic_handler(bp->cnic_data,
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CNIC_DRV_STATE_HANDLES_IRQ))
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NULL);
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c_ops->cnic_handler(bp->cnic_data, NULL);
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rcu_read_unlock();
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rcu_read_unlock();
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}
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status &= ~mask;
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status &= ~mask;
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}
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}
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@ -4816,6 +4816,8 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev)
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return err;
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return err;
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}
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}
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ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
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return 0;
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return 0;
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}
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}
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@ -5136,6 +5138,7 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
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if (ret)
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if (ret)
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return ret;
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return ret;
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ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
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return 0;
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return 0;
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}
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}
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@ -5387,6 +5390,7 @@ static void cnic_stop_hw(struct cnic_dev *dev)
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}
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}
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cnic_shutdown_rings(dev);
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cnic_shutdown_rings(dev);
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cp->stop_cm(dev);
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cp->stop_cm(dev);
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cp->ethdev->drv_state &= ~CNIC_DRV_STATE_HANDLES_IRQ;
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clear_bit(CNIC_F_CNIC_UP, &dev->flags);
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clear_bit(CNIC_F_CNIC_UP, &dev->flags);
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RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
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RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
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synchronize_rcu();
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synchronize_rcu();
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@ -179,6 +179,7 @@ struct cnic_eth_dev {
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#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
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#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
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#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
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#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
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#define CNIC_DRV_STATE_NO_FCOE 0x00000010
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#define CNIC_DRV_STATE_NO_FCOE 0x00000010
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#define CNIC_DRV_STATE_HANDLES_IRQ 0x00000020
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u32 chip_id;
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u32 chip_id;
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u32 max_kwqe_pending;
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u32 max_kwqe_pending;
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struct pci_dev *pdev;
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struct pci_dev *pdev;
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