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ARM: dts: Add minimal support for dm8168-evm
This allows booting the device with basic functionality. Note that at least on my revision c board the DDR3 does not seem to work properly and only some of the memory can be reliably used. Also, the mainline u-boot does not seem to properly initialize the ethernet, so I've been using the old TI u-boot at: http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary Cc: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren
parent
7383ca9255
commit
ac7452cee7
3 changed files with 131 additions and 0 deletions
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@ -348,6 +348,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \
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omap3-sbc-t3730.dtb \
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omap3-thunder.dtb \
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omap3-zoom3.dtb
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dtb-$(CONFIG_SOC_TI81XX) += dm8168-evm.dtb
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dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \
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am335x-bone.dtb \
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am335x-boneblack.dtb \
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129
arch/arm/boot/dts/dm8168-evm.dts
Normal file
129
arch/arm/boot/dts/dm8168-evm.dts
Normal file
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@ -0,0 +1,129 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "dm816x.dtsi"
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/ {
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model = "DM8168 EVM";
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compatible = "ti,dm8168-evm", "ti,dm8168";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000 /* 1 GB */
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0xc0000000 0x40000000>; /* 1 GB */
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};
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/* FDC6331L controlled by SD_POW pin */
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vmmcsd_fixed: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&dm816x_pinmux {
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mcspi1_pins: pinmux_mcspi1_pins {
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pinctrl-single,pins = <
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DM816X_IOPAD(0x0a94, PIN_INPUT | MUX_MODE0) /* SPI_SCLK */
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DM816X_IOPAD(0x0a98, PIN_OUTPUT | MUX_MODE0) /* SPI_SCS0 */
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DM816X_IOPAD(0x0aa8, PIN_INPUT | MUX_MODE0) /* SPI_D0 */
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DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */
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>;
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};
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};
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&i2c1 {
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extgpio0: pcf8575@20 {
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compatible = "nxp,pcf8575";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&i2c2 {
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extgpio1: pcf8575@20 {
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compatible = "nxp,pcf8575";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&gpmc {
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ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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linux,mtd-name= "micron,mt29f2g16aadwp";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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#address-cells = <1>;
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#size-cells = <1>;
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ti,nand-ecc-opt = "bch8";
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wait-on-read = "true";
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gpmc,wait-on-write = "true";
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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partition@0 {
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label = "X-Loader";
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reg = <0 0x80000>;
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};
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partition@0x80000 {
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label = "U-Boot";
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reg = <0x80000 0x1c0000>;
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};
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partition@0x1c0000 {
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label = "Environment";
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reg = <0x240000 0x40000>;
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};
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partition@0x280000 {
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label = "Kernel";
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reg = <0x280000 0x500000>;
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};
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partition@0x780000 {
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label = "Filesystem";
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reg = <0x780000 0xf880000>;
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};
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};
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};
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&mcspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcspi1_pins>;
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m25p80@0 {
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compatible = "w25x32";
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spi-max-frequency = <48000000>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&mmc1 {
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vmmc-supply = <&vmmcsd_fixed>;
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};
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@ -61,6 +61,7 @@
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#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
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#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
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#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
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#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
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