drm/i915/gtt: Clear the cachelines upon resume

Required for my pineview system to not barf after resuming.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2010-12-08 14:28:54 +00:00
parent d1c3b177b9
commit a8e93126a6

View file

@ -35,6 +35,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
struct drm_i915_gem_object *obj;
list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
i915_gem_clflush_object(obj);
if (dev_priv->mm.gtt->needs_dmar) {
BUG_ON(!obj->sg_list);
@ -51,7 +53,6 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
obj->agp_type);
}
/* Be paranoid and flush the chipset cache. */
intel_gtt_chipset_flush();
}