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RDMA/mlx5: Support handling of SW encap ICM area
New type for this ICM area, now the user can allocate/deallocate the new type of SW encap ICM memory, to store the encap header data which are managed by SW. Signed-off-by: Shun Hao <shunh@nvidia.com> Link: https://lore.kernel.org/r/546fe43fc700240709e30acf7713ec6834d652bd.1701871118.git.leon@kernel.org Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -341,6 +341,8 @@ static enum mlx5_sw_icm_type get_icm_type(int uapi_type)
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return MLX5_SW_ICM_TYPE_HEADER_MODIFY;
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
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return MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN;
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case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
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return MLX5_SW_ICM_TYPE_SW_ENCAP;
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case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
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default:
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return MLX5_SW_ICM_TYPE_STEERING;
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@ -364,6 +366,7 @@ static struct ib_dm *handle_alloc_dm_sw_icm(struct ib_ucontext *ctx,
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switch (type) {
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case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
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if (!(MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner) ||
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MLX5_CAP_FLOWTABLE_NIC_TX(dev, sw_owner) ||
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MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner_v2) ||
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@ -438,6 +441,7 @@ struct ib_dm *mlx5_ib_alloc_dm(struct ib_device *ibdev,
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case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
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return handle_alloc_dm_sw_icm(context, attr, attrs, type);
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default:
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return ERR_PTR(-EOPNOTSUPP);
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@ -491,6 +495,7 @@ static int mlx5_ib_dealloc_dm(struct ib_dm *ibdm,
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case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
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return mlx5_dm_icm_dealloc(ctx, to_icm(ibdm));
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default:
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return -EOPNOTSUPP;
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@ -1347,6 +1347,7 @@ struct ib_mr *mlx5_ib_reg_dm_mr(struct ib_pd *pd, struct ib_dm *dm,
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case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
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case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
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if (attr->access_flags & ~MLX5_IB_DM_SW_ICM_ALLOWED_ACCESS)
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return ERR_PTR(-EINVAL);
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@ -688,6 +688,7 @@ enum mlx5_sw_icm_type {
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MLX5_SW_ICM_TYPE_STEERING,
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MLX5_SW_ICM_TYPE_HEADER_MODIFY,
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MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN,
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MLX5_SW_ICM_TYPE_SW_ENCAP,
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};
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#define MLX5_MAX_RESERVED_GIDS 8
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@ -64,6 +64,7 @@ enum mlx5_ib_uapi_dm_type {
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MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
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MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
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MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM,
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MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM,
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};
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enum mlx5_ib_uapi_devx_create_event_channel_flags {
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