sh-pfc: Split pins and functions definition tables

Split the GPIOs table into a pins table for real GPIOs and a functions
table for function GPIOs.

Only register pins with the pinctrl core. The function GPIOs remain
accessible as GPIOs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laurent Pinchart 2012-11-29 13:24:07 +01:00
parent 24d6b36e91
commit a373ed0aa2
20 changed files with 193 additions and 106 deletions

View file

@ -92,13 +92,14 @@ static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
static bool sh_pfc_gpio_is_pin(struct sh_pfc *pfc, unsigned int gpio)
{
return (gpio < pfc->info->nr_pins) &&
(pfc->info->gpios[gpio].enum_id != 0);
(pfc->info->pins[gpio].enum_id != 0);
}
bool sh_pfc_gpio_is_function(struct sh_pfc *pfc, unsigned int gpio)
{
return (gpio >= pfc->info->nr_pins) && (gpio < pfc->info->nr_gpios) &&
(pfc->info->gpios[gpio].enum_id != 0);
return (gpio >= pfc->info->nr_pins) &&
(gpio < pfc->info->nr_pins + pfc->info->nr_func_gpios) &&
(pfc->info->func_gpios[gpio - pfc->info->nr_pins].enum_id != 0);
}
static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
@ -234,7 +235,7 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
static int sh_pfc_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
{
struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio];
struct pinmux_pin *gpiop = &pfc->info->pins[gpio];
struct pinmux_data_reg *data_reg;
int k, n;
@ -291,7 +292,7 @@ static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
struct pinmux_data_reg **drp, int *bitp)
{
struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio];
struct pinmux_pin *gpiop = &pfc->info->pins[gpio];
int k, n;
if (!sh_pfc_gpio_is_pin(pfc, gpio))
@ -352,12 +353,16 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
pinmux_enum_t *enum_idp)
{
pinmux_enum_t enum_id = pfc->info->gpios[gpio].enum_id;
pinmux_enum_t *data = pfc->info->gpio_data;
pinmux_enum_t enum_id;
int k;
if (!sh_pfc_gpio_is_pin(pfc, gpio) &&
!sh_pfc_gpio_is_function(pfc, gpio)) {
if (sh_pfc_gpio_is_pin(pfc, gpio)) {
enum_id = pfc->info->pins[gpio].enum_id;
} else if (sh_pfc_gpio_is_function(pfc, gpio)) {
unsigned int offset = gpio - pfc->info->nr_pins;
enum_id = pfc->info->func_gpios[offset].enum_id;
} else {
pr_err("non data/mark enum_id for gpio %d\n", gpio);
return -1;
}

View file

@ -183,7 +183,7 @@ static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
gc->label = pfc->info->name;
gc->owner = THIS_MODULE;
gc->base = 0;
gc->ngpio = pfc->info->nr_gpios;
gc->ngpio = pfc->info->nr_pins + pfc->info->nr_func_gpios;
}
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
@ -206,7 +206,8 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
pfc->gpio = chip;
pr_info("%s handling gpio 0 -> %u\n",
pfc->info->name, pfc->info->nr_gpios - 1);
pfc->info->name,
pfc->info->nr_pins + pfc->info->nr_func_gpios - 1);
return 0;
}

View file

@ -1654,11 +1654,13 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK, MSEL5CR_30_1, MSEL5CR_29_0),
};
static struct pinmux_gpio pinmux_gpios[] = {
/* PORT */
static struct pinmux_pin pinmux_pins[] = {
GPIO_PORT_ALL(),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* IRQ */
GPIO_FN(IRQ0_PORT2), GPIO_FN(IRQ0_PORT13),
GPIO_FN(IRQ1),
@ -2592,9 +2594,10 @@ struct sh_pfc_soc_info r8a7740_pinmux_info = {
.function = { PINMUX_FUNCTION_BEGIN,
PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PORT211 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1450,8 +1450,13 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
PINMUX_GPIO_GP_ALL(),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(AVS1), GPIO_FN(AVS2), GPIO_FN(A17), GPIO_FN(A18),
GPIO_FN(A19),
@ -2609,9 +2614,10 @@ struct sh_pfc_soc_info r8a7779_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_GP_6_8 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -703,7 +703,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PA */
PINMUX_GPIO(GPIO_PA7, PA7_DATA),
@ -815,7 +815,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PF2, PF2_DATA),
PINMUX_GPIO(GPIO_PF1, PF1_DATA),
PINMUX_GPIO(GPIO_PF0, PF0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* INTC */
GPIO_FN(PINT7_PB),
GPIO_FN(PINT6_PB),
@ -1577,9 +1581,10 @@ struct sh_pfc_soc_info sh7203_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PF0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1072,7 +1072,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SD_D2_MARK, PK0MD_10),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* Port A */
PINMUX_GPIO(GPIO_PA3, PA3_DATA),
@ -1216,7 +1216,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PK2, PK2_DATA),
PINMUX_GPIO(GPIO_PK1, PK1_DATA),
PINMUX_GPIO(GPIO_PK0, PK0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* INTC */
GPIO_FN(PINT7_PG),
GPIO_FN(PINT6_PG),
@ -2116,9 +2120,10 @@ struct sh_pfc_soc_info sh7264_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PK0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1452,7 +1452,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(PWM1A_MARK, PJ0MD_100),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* Port A */
PINMUX_GPIO(GPIO_PA1, PA1_DATA),
PINMUX_GPIO(GPIO_PA0, PA0_DATA),
@ -1613,7 +1613,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* INTC */
GPIO_FN(IRQ7_PG),
GPIO_FN(IRQ6_PG),
@ -2819,9 +2823,10 @@ struct sh_pfc_soc_info sh7269_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PJ0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -929,11 +929,13 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
};
static struct pinmux_gpio pinmux_gpios[] = {
/* PORT */
static struct pinmux_pin pinmux_pins[] = {
GPIO_PORT_ALL(),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* IRQ */
GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1),
GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8),
@ -1640,9 +1642,10 @@ struct sh_pfc_soc_info sh7372_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PORT190 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1539,9 +1539,13 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
GPIO_PORT_ALL(),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* Table 25-1 (Functions 0-7) */
GPIO_FN(VBUS_0),
GPIO_FN(GPI0),
@ -2776,9 +2780,10 @@ struct sh_pfc_soc_info sh73a0_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PORT309 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -606,7 +606,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PTA */
PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
@ -759,7 +759,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* BSC */
GPIO_FN(D31),
GPIO_FN(D30),
@ -1220,9 +1224,10 @@ struct sh_pfc_soc_info sh7720_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PTV0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -787,7 +787,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PTA */
PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
@ -982,7 +982,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* SCIF0 */
GPIO_FN(SCIF0_TXD),
GPIO_FN(SCIF0_RXD),
@ -1764,9 +1768,10 @@ struct sh_pfc_soc_info sh7722_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PTZ1 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -923,7 +923,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SIUBISLD_MARK, PSD1_PSD0_FN2, PTZ0_FN),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PTA */
PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
@ -1139,7 +1139,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* SCIF0 */
GPIO_FN(SCIF0_PTT_TXD),
GPIO_FN(SCIF0_PTT_RXD),
@ -1888,9 +1892,10 @@ struct sh_pfc_soc_info sh7723_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PTZ0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1192,7 +1192,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SCIF3_I_TXD_MARK, PSB14_1, PTZ3_FN),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PTA */
PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
@ -1418,7 +1418,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* BSC */
GPIO_FN(D31),
GPIO_FN(D30),
@ -2210,9 +2214,10 @@ struct sh_pfc_soc_info sh7724_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PTZ0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1384,9 +1384,13 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_IPSR_DATA(IP11_28, ST_CLKOUT),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
PINMUX_GPIO_GP_ALL(),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0),
GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1),
GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0),
@ -2460,9 +2464,10 @@ struct sh_pfc_soc_info sh7734_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_GP_5_11 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -1114,7 +1114,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PTA */
PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
@ -1370,7 +1370,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* PTA (mobule: LBSC, RGMII) */
GPIO_FN(BS),
GPIO_FN(RDWR),
@ -2267,9 +2271,10 @@ struct sh_pfc_soc_info sh7757_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PTZ7 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -702,7 +702,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PA */
PINMUX_GPIO(GPIO_PA7, PA7_DATA),
PINMUX_GPIO(GPIO_PA6, PA6_DATA),
@ -845,7 +845,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PR2, PR2_DATA),
PINMUX_GPIO(GPIO_PR1, PR1_DATA),
PINMUX_GPIO(GPIO_PR0, PR0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* FN */
GPIO_FN(D63_AD31),
GPIO_FN(D62_AD30),
@ -1289,9 +1293,10 @@ struct sh_pfc_soc_info sh7785_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PR0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -427,7 +427,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(SSI3_SCK_MARK, P2MSEL6_1, P2MSEL5_1, PJ1_FN),
};
static struct pinmux_gpio pinmux_gpios[] = {
static struct pinmux_pin pinmux_pins[] = {
/* PA */
PINMUX_GPIO(GPIO_PA7, PA7_DATA),
PINMUX_GPIO(GPIO_PA6, PA6_DATA),
@ -505,7 +505,11 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = {
/* FN */
GPIO_FN(CDE),
GPIO_FN(ETH_MAGIC),
@ -822,9 +826,10 @@ struct sh_pfc_soc_info sh7786_pinmux_info = {
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = pinmux_gpios,
.nr_pins = GPIO_PJ0 + 1,
.nr_gpios = ARRAY_SIZE(pinmux_gpios),
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.func_gpios = pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,

View file

@ -306,7 +306,7 @@ static pinmux_enum_t shx3_pinmux_data[] = {
PINMUX_DATA(IRQOUT_MARK, PH0_FN),
};
static struct pinmux_gpio shx3_pinmux_gpios[] = {
static struct pinmux_pin shx3_pinmux_pins[] = {
/* PA */
PINMUX_GPIO(GPIO_PA7, PA7_DATA),
PINMUX_GPIO(GPIO_PA6, PA6_DATA),
@ -384,7 +384,11 @@ static struct pinmux_gpio shx3_pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PH2, PH2_DATA),
PINMUX_GPIO(GPIO_PH1, PH1_DATA),
PINMUX_GPIO(GPIO_PH0, PH0_DATA),
};
#define PINMUX_FN_BASE ARRAY_SIZE(shx3_pinmux_pins)
static struct pinmux_func shx3_pinmux_func_gpios[] = {
/* FN */
GPIO_FN(D31),
GPIO_FN(D30),
@ -569,9 +573,10 @@ struct sh_pfc_soc_info shx3_pinmux_info = {
PINMUX_INPUT_PULLUP_END },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.gpios = shx3_pinmux_gpios,
.nr_pins = GPIO_PH0 + 1,
.nr_gpios = ARRAY_SIZE(shx3_pinmux_gpios),
.pins = shx3_pinmux_pins,
.nr_pins = ARRAY_SIZE(shx3_pinmux_pins),
.func_gpios = shx3_pinmux_func_gpios,
.nr_func_gpios = ARRAY_SIZE(shx3_pinmux_func_gpios),
.gpio_data = shx3_pinmux_data,
.gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
.cfg_regs = shx3_pinmux_config_regs,

View file

@ -32,7 +32,7 @@ struct sh_pfc_pinctrl {
struct sh_pfc *pfc;
struct pinmux_gpio **functions;
struct pinmux_func **functions;
unsigned int nr_functions;
struct pinctrl_pin_desc *pads;
@ -125,7 +125,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
spin_lock_irqsave(&pfc->lock, flags);
pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
/*
* See if the present config needs to first be de-configured.
@ -157,8 +157,8 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
GPIO_CFG_REQ) != 0)
goto err;
pfc->info->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
pfc->info->gpios[offset].flags |= new_type;
pfc->info->pins[offset].flags &= ~PINMUX_FLAG_TYPE;
pfc->info->pins[offset].flags |= new_type;
ret = 0;
@ -168,7 +168,6 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
return ret;
}
static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned offset)
@ -180,7 +179,7 @@ static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
spin_lock_irqsave(&pfc->lock, flags);
pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
switch (pinmux_type) {
case PINMUX_TYPE_GPIO:
@ -213,7 +212,7 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
spin_lock_irqsave(&pfc->lock, flags);
pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
@ -247,7 +246,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
*config = pfc->info->gpios[pin].flags & PINMUX_FLAG_TYPE;
*config = pfc->info->pins[pin].flags & PINMUX_FLAG_TYPE;
return 0;
}
@ -297,7 +296,7 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
{
int i;
pmx->nr_pads = pfc->info->nr_gpios;
pmx->nr_pads = pfc->info->nr_pins;
pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
GFP_KERNEL);
@ -308,17 +307,10 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
for (i = 0; i < pmx->nr_pads; i++) {
struct pinctrl_pin_desc *pin = pmx->pads + i;
struct pinmux_gpio *gpio = pfc->info->gpios + i;
struct pinmux_pin *gpio = pfc->info->pins + i;
pin->number = i;
pin->name = gpio->name;
/* XXX */
if (unlikely(!gpio->enum_id))
continue;
if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
pmx->nr_functions++;
}
return 0;
@ -328,16 +320,23 @@ static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
{
int i, fn;
for (i = 0; i < pfc->info->nr_func_gpios; i++) {
struct pinmux_func *func = pfc->info->func_gpios + i;
if (func->enum_id)
pmx->nr_functions++;
}
pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
sizeof(*pmx->functions), GFP_KERNEL);
if (unlikely(!pmx->functions))
return -ENOMEM;
for (i = fn = 0; i < pmx->nr_pads; i++) {
struct pinmux_gpio *gpio = pfc->info->gpios + i;
for (i = fn = 0; i < pfc->info->nr_func_gpios; i++) {
struct pinmux_func *func = pfc->info->func_gpios + i;
if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
pmx->functions[fn++] = gpio;
if (func->enum_id)
pmx->functions[fn++] = func;
}
return 0;

View file

@ -35,23 +35,27 @@ enum {
#define PINMUX_FLAG_DREG_SHIFT 10
#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
struct pinmux_gpio {
struct pinmux_pin {
const pinmux_enum_t enum_id;
pinmux_flag_t flags;
const char *name;
};
struct pinmux_func {
const pinmux_enum_t enum_id;
const char *name;
};
#define PINMUX_GPIO(gpio, data_or_mark) \
[gpio] = { \
.name = __stringify(gpio), \
.enum_id = data_or_mark, \
.flags = PINMUX_TYPE_GPIO \
}
#define PINMUX_GPIO_FN(gpio, data_or_mark) \
[gpio] = { \
#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
[gpio - (base)] = { \
.name = __stringify(gpio), \
.enum_id = data_or_mark, \
.flags = PINMUX_TYPE_FUNCTION \
}
#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
@ -106,9 +110,10 @@ struct sh_pfc_soc_info {
struct pinmux_range output;
struct pinmux_range function;
struct pinmux_gpio *gpios;
struct pinmux_pin *pins;
unsigned int nr_pins;
unsigned int nr_gpios;
struct pinmux_func *func_gpios;
unsigned int nr_func_gpios;
struct pinmux_cfg_reg *cfg_regs;
struct pinmux_data_reg *data_regs;
@ -145,7 +150,7 @@ enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
#define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
#define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, str##_MARK)
#define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
/* helper macro for pinmux_enum_t */
#define PORT_DATA_I(nr) \