mirror of
https://github.com/torvalds/linux
synced 2024-09-28 15:31:19 +00:00
CRIS v32: Rewrite ARTPEC-3 gpio driver to avoid volatiles and general cleanup.
Changes as suggested by Andrew Morton, plus general cleanup to ease later consolidation of driver into machine common driver. - Correct parameter type of gpio_write to const char __user * - Remove volatile from the arrays of machine dependent registers, use readl and writel to access them instead. - Remove useless casts of void. - Use spin_lock_irqsave for locking. - Break gpio_write into smaller sub-functions. - Remove useless breaks after returns. - Don't perform any change in IO_CFG_WRITE_MODE if values are invalid. (previously values were set and then set to zero) - Change cast for copy_to_user to (void __user *) - Make file_operations gpio_fops static and const. - Make setget_output static. (However, it's still inline since the CRIS architecture is still not SMP, which makes the function small enough to inline)
This commit is contained in:
Jesper Nilsson
parent
7800029df3
commit
a34d24425e
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@ -72,13 +72,13 @@ static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg);
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#endif
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static int gpio_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg);
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static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
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loff_t *off);
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unsigned int cmd, unsigned long arg);
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static ssize_t gpio_write(struct file *file, const char __user *buf,
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size_t count, loff_t *off);
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static int gpio_open(struct inode *inode, struct file *filp);
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static int gpio_release(struct inode *inode, struct file *filp);
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static unsigned int gpio_poll(struct file *filp,
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struct poll_table_struct *wait);
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struct poll_table_struct *wait);
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/* private data per open() of this driver */
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@ -96,6 +96,10 @@ struct gpio_private {
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};
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static void gpio_set_alarm(struct gpio_private *priv);
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static int gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
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static int gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd,
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unsigned long arg);
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/* linked list of alarms to check for */
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@ -103,23 +107,23 @@ static struct gpio_private *alarmlist;
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static int wanted_interrupts;
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static DEFINE_SPINLOCK(alarm_lock);
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static DEFINE_SPINLOCK(gpio_lock);
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#define NUM_PORTS (GPIO_MINOR_LAST+1)
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#define GIO_REG_RD_ADDR(reg) \
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(volatile unsigned long *)(regi_gio + REG_RD_ADDR_gio_##reg)
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(unsigned long *)(regi_gio + REG_RD_ADDR_gio_##reg)
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#define GIO_REG_WR_ADDR(reg) \
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(volatile unsigned long *)(regi_gio + REG_WR_ADDR_gio_##reg)
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unsigned long led_dummy;
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unsigned long port_d_dummy; /* Only input on Artpec-3 */
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unsigned long port_e_dummy; /* Non existent on Artpec-3 */
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(unsigned long *)(regi_gio + REG_WR_ADDR_gio_##reg)
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static unsigned long led_dummy;
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static unsigned long port_d_dummy; /* Only input on Artpec-3 */
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#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
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static unsigned long port_e_dummy; /* Non existent on Artpec-3 */
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static unsigned long virtual_dummy;
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static unsigned long virtual_rw_pv_oe = CONFIG_ETRAX_DEF_GIO_PV_OE;
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static unsigned short cached_virtual_gpio_read;
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#endif
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static volatile unsigned long *data_out[NUM_PORTS] = {
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static unsigned long *data_out[NUM_PORTS] = {
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GIO_REG_WR_ADDR(rw_pa_dout),
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GIO_REG_WR_ADDR(rw_pb_dout),
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&led_dummy,
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@ -131,7 +135,7 @@ static volatile unsigned long *data_out[NUM_PORTS] = {
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#endif
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};
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static volatile unsigned long *data_in[NUM_PORTS] = {
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static unsigned long *data_in[NUM_PORTS] = {
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GIO_REG_RD_ADDR(r_pa_din),
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GIO_REG_RD_ADDR(r_pb_din),
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&led_dummy,
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@ -167,7 +171,7 @@ static unsigned long changeable_bits[NUM_PORTS] = {
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#endif
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};
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static volatile unsigned long *dir_oe[NUM_PORTS] = {
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static unsigned long *dir_oe[NUM_PORTS] = {
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GIO_REG_WR_ADDR(rw_pa_oe),
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GIO_REG_WR_ADDR(rw_pb_oe),
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&led_dummy,
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@ -179,8 +183,7 @@ static volatile unsigned long *dir_oe[NUM_PORTS] = {
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#endif
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};
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static void
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gpio_set_alarm(struct gpio_private *priv)
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static void gpio_set_alarm(struct gpio_private *priv)
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{
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int bit;
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int intr_cfg;
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@ -188,7 +191,7 @@ gpio_set_alarm(struct gpio_private *priv)
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int pins;
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unsigned long flags;
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local_irq_save(flags);
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spin_lock_irqsave(&gpio_lock, flags);
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intr_cfg = REG_RD_INT(gio, regi_gio, rw_intr_cfg);
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pins = REG_RD_INT(gio, regi_gio, rw_intr_pins);
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mask = REG_RD_INT(gio, regi_gio, rw_intr_mask) & I2C_INTERRUPT_BITS;
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@ -218,14 +221,13 @@ gpio_set_alarm(struct gpio_private *priv)
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REG_WR_INT(gio, regi_gio, rw_intr_pins, pins);
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REG_WR_INT(gio, regi_gio, rw_intr_mask, mask);
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local_irq_restore(flags);
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spin_unlock_irqrestore(&gpio_lock, flags);
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}
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static unsigned int
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gpio_poll(struct file *file, struct poll_table_struct *wait)
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static unsigned int gpio_poll(struct file *file, struct poll_table_struct *wait)
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{
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unsigned int mask = 0;
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struct gpio_private *priv = (struct gpio_private *)file->private_data;
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struct gpio_private *priv = file->private_data;
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unsigned long data;
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unsigned long tmp;
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@ -235,7 +237,7 @@ gpio_poll(struct file *file, struct poll_table_struct *wait)
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poll_wait(file, &priv->alarm_wq, wait);
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if (priv->minor <= GPIO_MINOR_D) {
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data = *data_in[priv->minor];
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data = readl(data_in[priv->minor]);
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REG_WR_INT(gio, regi_gio, rw_ack_intr, wanted_interrupts);
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tmp = REG_RD_INT(gio, regi_gio, rw_intr_mask);
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tmp &= I2C_INTERRUPT_BITS;
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@ -251,12 +253,12 @@ gpio_poll(struct file *file, struct poll_table_struct *wait)
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return mask;
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}
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static irqreturn_t
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gpio_interrupt(int irq, void *dev_id)
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static irqreturn_t gpio_interrupt(int irq, void *dev_id)
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{
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reg_gio_rw_intr_mask intr_mask;
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reg_gio_r_masked_intr masked_intr;
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reg_gio_rw_ack_intr ack_intr;
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unsigned long flags;
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unsigned long tmp;
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unsigned long tmp2;
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#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
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@ -268,9 +270,9 @@ gpio_interrupt(int irq, void *dev_id)
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tmp = REG_TYPE_CONV(unsigned long, reg_gio_r_masked_intr, masked_intr);
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/* Find those that we have enabled */
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spin_lock(&alarm_lock);
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spin_lock_irqsave(&gpio_lock, flags);
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tmp &= wanted_interrupts;
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spin_unlock(&alarm_lock);
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spin_unlock_irqrestore(&gpio_lock, flags);
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#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
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/* Something changed on virtual GPIO. Interrupt is acked by
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@ -304,15 +306,42 @@ gpio_interrupt(int irq, void *dev_id)
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return IRQ_RETVAL(tmp);
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}
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static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
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loff_t *off)
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static void gpio_write_bit(unsigned long *port, unsigned char data, int bit,
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unsigned char clk_mask, unsigned char data_mask)
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{
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struct gpio_private *priv = (struct gpio_private *)file->private_data;
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unsigned char data, clk_mask, data_mask, write_msb;
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unsigned long shadow = readl(port) & ~clk_mask;
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writel(shadow, port);
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if (data & 1 << bit)
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shadow |= data_mask;
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else
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shadow &= ~data_mask;
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writel(shadow, port);
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/* For FPGA: min 5.0ns (DCC) before CCLK high */
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shadow |= clk_mask;
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writel(shadow, port);
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}
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static void gpio_write_byte(struct gpio_private *priv, unsigned long *port,
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unsigned char data)
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{
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int i;
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if (priv->write_msb)
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for (i = 7; i >= 0; i--)
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gpio_write_bit(port, data, i, priv->clk_mask,
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priv->data_mask);
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else
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for (i = 0; i <= 7; i++)
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gpio_write_bit(port, data, i, priv->clk_mask,
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priv->data_mask);
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}
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static ssize_t gpio_write(struct file *file, const char __user *buf,
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size_t count, loff_t *off)
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{
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struct gpio_private *priv = file->private_data;
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unsigned long flags;
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unsigned long shadow;
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volatile unsigned long *port;
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ssize_t retval = count;
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/* Only bits 0-7 may be used for write operations but allow all
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devices except leds... */
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@ -330,55 +359,25 @@ static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
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if (!access_ok(VERIFY_READ, buf, count))
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return -EFAULT;
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clk_mask = priv->clk_mask;
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data_mask = priv->data_mask;
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/* It must have been configured using the IO_CFG_WRITE_MODE */
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/* Perhaps a better error code? */
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if (clk_mask == 0 || data_mask == 0)
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if (priv->clk_mask == 0 || priv->data_mask == 0)
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return -EPERM;
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write_msb = priv->write_msb;
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D(printk(KERN_DEBUG "gpio_write: %lu to data 0x%02X clk 0x%02X "
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"msb: %i\n",
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count, data_mask, clk_mask, write_msb));
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port = data_out[priv->minor];
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count, priv->data_mask, priv->clk_mask, priv->write_msb));
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while (count--) {
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int i;
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data = *buf++;
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if (priv->write_msb) {
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for (i = 7; i >= 0; i--) {
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local_irq_save(flags);
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shadow = *port;
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*port = shadow &= ~clk_mask;
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if (data & 1<<i)
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*port = shadow |= data_mask;
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else
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*port = shadow &= ~data_mask;
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/* For FPGA: min 5.0ns (DCC) before CCLK high */
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*port = shadow |= clk_mask;
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local_irq_restore(flags);
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}
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} else {
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for (i = 0; i <= 7; i++) {
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local_irq_save(flags);
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shadow = *port;
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*port = shadow &= ~clk_mask;
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if (data & 1<<i)
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*port = shadow |= data_mask;
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else
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*port = shadow &= ~data_mask;
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/* For FPGA: min 5.0ns (DCC) before CCLK high */
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*port = shadow |= clk_mask;
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local_irq_restore(flags);
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}
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}
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}
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spin_lock_irqsave(&gpio_lock, flags);
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while (count--)
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gpio_write_byte(priv, data_out[priv->minor], *buf++);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return retval;
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}
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static int
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gpio_open(struct inode *inode, struct file *filp)
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static int gpio_open(struct inode *inode, struct file *filp)
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{
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struct gpio_private *priv;
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int p = iminor(inode);
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@ -394,7 +393,7 @@ gpio_open(struct inode *inode, struct file *filp)
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memset(priv, 0, sizeof(*priv));
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priv->minor = p;
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filp->private_data = (void *)priv;
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filp->private_data = priv;
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/* initialize the io/alarm struct, not for PWM ports though */
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if (p <= GPIO_MINOR_LAST) {
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@ -407,17 +406,16 @@ gpio_open(struct inode *inode, struct file *filp)
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init_waitqueue_head(&priv->alarm_wq);
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/* link it into our alarmlist */
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spin_lock_irq(&alarm_lock);
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spin_lock_irq(&gpio_lock);
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priv->next = alarmlist;
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alarmlist = priv;
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spin_unlock_irq(&alarm_lock);
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spin_unlock_irq(&gpio_lock);
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}
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return 0;
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}
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static int
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gpio_release(struct inode *inode, struct file *filp)
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static int gpio_release(struct inode *inode, struct file *filp)
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{
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struct gpio_private *p;
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struct gpio_private *todel;
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@ -425,11 +423,11 @@ gpio_release(struct inode *inode, struct file *filp)
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unsigned long a_high, a_low;
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/* prepare to free private structure */
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todel = (struct gpio_private *)filp->private_data;
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todel = filp->private_data;
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/* unlink from alarmlist - only for non-PWM ports though */
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if (todel->minor <= GPIO_MINOR_LAST) {
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spin_lock_irq(&alarm_lock);
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spin_lock_irq(&gpio_lock);
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p = alarmlist;
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if (p == todel)
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@ -463,7 +461,7 @@ gpio_release(struct inode *inode, struct file *filp)
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a_low |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
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#endif
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spin_unlock_irq(&alarm_lock);
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spin_unlock_irq(&gpio_lock);
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}
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kfree(todel);
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@ -482,11 +480,13 @@ inline unsigned long setget_input(struct gpio_private *priv, unsigned long arg)
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unsigned long flags;
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unsigned long dir_shadow;
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local_irq_save(flags);
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dir_shadow = *dir_oe[priv->minor];
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dir_shadow &= ~(arg & changeable_dir[priv->minor]);
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*dir_oe[priv->minor] = dir_shadow;
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local_irq_restore(flags);
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spin_lock_irqsave(&gpio_lock, flags);
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dir_shadow = readl(dir_oe[priv->minor]) &
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~(arg & changeable_dir[priv->minor]);
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writel(dir_shadow, dir_oe[priv->minor]);
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spin_unlock_irqrestore(&gpio_lock, flags);
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if (priv->minor == GPIO_MINOR_C)
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dir_shadow ^= 0xFFFF; /* Only 16 bits */
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@ -501,36 +501,32 @@ inline unsigned long setget_input(struct gpio_private *priv, unsigned long arg)
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} /* setget_input */
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inline unsigned long setget_output(struct gpio_private *priv, unsigned long arg)
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static inline unsigned long setget_output(struct gpio_private *priv,
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unsigned long arg)
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{
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unsigned long flags;
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unsigned long dir_shadow;
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local_irq_save(flags);
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dir_shadow = *dir_oe[priv->minor];
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dir_shadow |= (arg & changeable_dir[priv->minor]);
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*dir_oe[priv->minor] = dir_shadow;
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local_irq_restore(flags);
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spin_lock_irqsave(&gpio_lock, flags);
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dir_shadow = readl(dir_oe[priv->minor]) |
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(arg & changeable_dir[priv->minor]);
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writel(dir_shadow, dir_oe[priv->minor]);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return dir_shadow;
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} /* setget_output */
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static int
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gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
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static int
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gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd, unsigned long arg);
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static int
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gpio_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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static int gpio_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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unsigned long flags;
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unsigned long val;
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unsigned long shadow;
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struct gpio_private *priv = (struct gpio_private *)file->private_data;
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struct gpio_private *priv = file->private_data;
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if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE)
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return -EINVAL;
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return -ENOTTY;
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/* Check for special ioctl handlers first */
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@ -549,23 +545,22 @@ gpio_ioctl(struct inode *inode, struct file *file,
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switch (_IOC_NR(cmd)) {
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case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
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/* Read the port. */
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return *data_in[priv->minor];
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break;
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return readl(data_in[priv->minor]);
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case IO_SETBITS:
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local_irq_save(flags);
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spin_lock_irqsave(&gpio_lock, flags);
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/* Set changeable bits with a 1 in arg. */
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shadow = *data_out[priv->minor];
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shadow |= (arg & changeable_bits[priv->minor]);
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*data_out[priv->minor] = shadow;
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local_irq_restore(flags);
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shadow = readl(data_out[priv->minor]) |
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(arg & changeable_bits[priv->minor]);
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writel(shadow, data_out[priv->minor]);
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spin_unlock_irqrestore(&gpio_lock, flags);
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break;
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case IO_CLRBITS:
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local_irq_save(flags);
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spin_lock_irqsave(&gpio_lock, flags);
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/* Clear changeable bits with a 1 in arg. */
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shadow = *data_out[priv->minor];
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shadow &= ~(arg & changeable_bits[priv->minor]);
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*data_out[priv->minor] = shadow;
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local_irq_restore(flags);
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shadow = readl(data_out[priv->minor]) &
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~(arg & changeable_bits[priv->minor]);
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writel(shadow, data_out[priv->minor]);
|
||||
spin_unlock_irqrestore(&gpio_lock, flags);
|
||||
break;
|
||||
case IO_HIGHALARM:
|
||||
/* Set alarm when bits with 1 in arg go high. */
|
||||
|
|
@ -585,13 +580,14 @@ gpio_ioctl(struct inode *inode, struct file *file,
|
|||
break;
|
||||
case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
|
||||
/* Read direction 0=input 1=output */
|
||||
return *dir_oe[priv->minor];
|
||||
return readl(dir_oe[priv->minor]);
|
||||
|
||||
case IO_SETINPUT: /* Use IO_SETGET_INPUT instead! */
|
||||
/* Set direction 0=unchanged 1=input,
|
||||
* return mask with 1=input
|
||||
*/
|
||||
return setget_input(priv, arg);
|
||||
break;
|
||||
|
||||
case IO_SETOUTPUT: /* Use IO_SETGET_OUTPUT instead! */
|
||||
/* Set direction 0=unchanged 1=output,
|
||||
* return mask with 1=output
|
||||
|
|
@ -600,56 +596,61 @@ gpio_ioctl(struct inode *inode, struct file *file,
|
|||
|
||||
case IO_CFG_WRITE_MODE:
|
||||
{
|
||||
unsigned long dir_shadow;
|
||||
dir_shadow = *dir_oe[priv->minor];
|
||||
int res = -EPERM;
|
||||
unsigned long dir_shadow, clk_mask, data_mask, write_msb;
|
||||
|
||||
clk_mask = arg & 0xFF;
|
||||
data_mask = (arg >> 8) & 0xFF;
|
||||
write_msb = (arg >> 16) & 0x01;
|
||||
|
||||
priv->clk_mask = arg & 0xFF;
|
||||
priv->data_mask = (arg >> 8) & 0xFF;
|
||||
priv->write_msb = (arg >> 16) & 0x01;
|
||||
/* Check if we're allowed to change the bits and
|
||||
* the direction is correct
|
||||
*/
|
||||
if (!((priv->clk_mask & changeable_bits[priv->minor]) &&
|
||||
(priv->data_mask & changeable_bits[priv->minor]) &&
|
||||
(priv->clk_mask & dir_shadow) &&
|
||||
(priv->data_mask & dir_shadow))) {
|
||||
priv->clk_mask = 0;
|
||||
priv->data_mask = 0;
|
||||
return -EPERM;
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
dir_shadow = readl(dir_oe[priv->minor]);
|
||||
if ((clk_mask & changeable_bits[priv->minor]) &&
|
||||
(data_mask & changeable_bits[priv->minor]) &&
|
||||
(clk_mask & dir_shadow) &&
|
||||
(data_mask & dir_shadow)) {
|
||||
priv->clk_mask = clk_mask;
|
||||
priv->data_mask = data_mask;
|
||||
priv->write_msb = write_msb;
|
||||
res = 0;
|
||||
}
|
||||
break;
|
||||
spin_unlock_irqrestore(&gpio_lock, flags);
|
||||
|
||||
return res;
|
||||
}
|
||||
case IO_READ_INBITS:
|
||||
/* *arg is result of reading the input pins */
|
||||
val = *data_in[priv->minor];
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
val = readl(data_in[priv->minor]);
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
return 0;
|
||||
break;
|
||||
case IO_READ_OUTBITS:
|
||||
/* *arg is result of reading the output shadow */
|
||||
val = *data_out[priv->minor];
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
break;
|
||||
case IO_SETGET_INPUT:
|
||||
/* bits set in *arg is set to input,
|
||||
* *arg updated with current input pins.
|
||||
*/
|
||||
if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
|
||||
if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
|
||||
return -EFAULT;
|
||||
val = setget_input(priv, val);
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
break;
|
||||
case IO_SETGET_OUTPUT:
|
||||
/* bits set in *arg is set to output,
|
||||
* *arg updated with current output pins.
|
||||
*/
|
||||
if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
|
||||
if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
|
||||
return -EFAULT;
|
||||
val = setget_output(priv, val);
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
break;
|
||||
default:
|
||||
|
|
@ -660,32 +661,32 @@ gpio_ioctl(struct inode *inode, struct file *file,
|
|||
}
|
||||
|
||||
#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
|
||||
static int
|
||||
virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short val;
|
||||
unsigned short shadow;
|
||||
struct gpio_private *priv = (struct gpio_private *)file->private_data;
|
||||
struct gpio_private *priv = file->private_data;
|
||||
|
||||
switch (_IOC_NR(cmd)) {
|
||||
case IO_SETBITS:
|
||||
local_irq_save(flags);
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
/* Set changeable bits with a 1 in arg. */
|
||||
i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
|
||||
shadow |= ~*dir_oe[priv->minor];
|
||||
shadow |= (arg & changeable_bits[priv->minor]);
|
||||
shadow |= ~readl(dir_oe[priv->minor]) |
|
||||
(arg & changeable_bits[priv->minor]);
|
||||
i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
|
||||
local_irq_restore(flags);
|
||||
spin_lock_irqrestore(&gpio_lock, flags);
|
||||
break;
|
||||
case IO_CLRBITS:
|
||||
local_irq_save(flags);
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
/* Clear changeable bits with a 1 in arg. */
|
||||
i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
|
||||
shadow |= ~*dir_oe[priv->minor];
|
||||
shadow &= ~(arg & changeable_bits[priv->minor]);
|
||||
shadow |= ~readl(dir_oe[priv->minor]) &
|
||||
~(arg & changeable_bits[priv->minor]);
|
||||
i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
|
||||
local_irq_restore(flags);
|
||||
spin_lock_irqrestore(&gpio_lock, flags);
|
||||
break;
|
||||
case IO_HIGHALARM:
|
||||
/* Set alarm when bits with 1 in arg go high. */
|
||||
|
|
@ -703,7 +704,7 @@ virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
case IO_CFG_WRITE_MODE:
|
||||
{
|
||||
unsigned long dir_shadow;
|
||||
dir_shadow = *dir_oe[priv->minor];
|
||||
dir_shadow = readl(dir_oe[priv->minor]);
|
||||
|
||||
priv->clk_mask = arg & 0xFF;
|
||||
priv->data_mask = (arg >> 8) & 0xFF;
|
||||
|
|
@ -723,17 +724,16 @@ virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
}
|
||||
case IO_READ_INBITS:
|
||||
/* *arg is result of reading the input pins */
|
||||
val = cached_virtual_gpio_read;
|
||||
val &= ~*dir_oe[priv->minor];
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
val = cached_virtual_gpio_read & ~readl(dir_oe[priv->minor]);
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case IO_READ_OUTBITS:
|
||||
/* *arg is result of reading the output shadow */
|
||||
i2c_read(VIRT_I2C_ADDR, (void *)&val, sizeof(val));
|
||||
val &= *dir_oe[priv->minor];
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
val &= readl(dir_oe[priv->minor]);
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
break;
|
||||
case IO_SETGET_INPUT:
|
||||
|
|
@ -741,11 +741,11 @@ virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
/* bits set in *arg is set to input,
|
||||
* *arg updated with current input pins.
|
||||
*/
|
||||
unsigned short input_mask = ~*dir_oe[priv->minor];
|
||||
if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
|
||||
unsigned short input_mask = ~readl(dir_oe[priv->minor]);
|
||||
if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
|
||||
return -EFAULT;
|
||||
val = setget_input(priv, val);
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
if ((input_mask & val) != input_mask) {
|
||||
/* Input pins changed. All ports desired as input
|
||||
|
|
@ -765,10 +765,10 @@ virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
/* bits set in *arg is set to output,
|
||||
* *arg updated with current output pins.
|
||||
*/
|
||||
if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
|
||||
if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
|
||||
return -EFAULT;
|
||||
val = setget_output(priv, val);
|
||||
if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
|
||||
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
|
||||
return -EFAULT;
|
||||
break;
|
||||
default:
|
||||
|
|
@ -778,8 +778,7 @@ virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
}
|
||||
#endif /* CONFIG_ETRAX_VIRTUAL_GPIO */
|
||||
|
||||
static int
|
||||
gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
|
||||
static int gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
unsigned char green;
|
||||
unsigned char red;
|
||||
|
|
@ -829,8 +828,7 @@ static int gpio_pwm_set_period(unsigned long arg, int pwm_port)
|
|||
struct io_pwm_set_period periods;
|
||||
reg_gio_rw_pwm0_var rw_pwm_widths;
|
||||
|
||||
if (copy_from_user(&periods, (struct io_pwm_set_period *) arg,
|
||||
sizeof(periods)))
|
||||
if (copy_from_user(&periods, (void __user *)arg, sizeof(periods)))
|
||||
return -EFAULT;
|
||||
if (periods.lo > 8191 || periods.hi > 8191)
|
||||
return -EINVAL;
|
||||
|
|
@ -856,8 +854,8 @@ static int gpio_pwm_set_duty(unsigned long arg, int pwm_port)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd, unsigned long arg)
|
||||
static int gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
int pwm_port = priv->minor - GPIO_MINOR_PWM0;
|
||||
|
||||
|
|
@ -874,7 +872,7 @@ gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd, unsigned long arg)
|
|||
return 0;
|
||||
}
|
||||
|
||||
struct file_operations gpio_fops = {
|
||||
static const struct file_operations gpio_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.poll = gpio_poll,
|
||||
.ioctl = gpio_ioctl,
|
||||
|
|
@ -884,8 +882,7 @@ struct file_operations gpio_fops = {
|
|||
};
|
||||
|
||||
#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
|
||||
static void
|
||||
virtual_gpio_init(void)
|
||||
static void __init virtual_gpio_init(void)
|
||||
{
|
||||
reg_gio_rw_intr_cfg intr_cfg;
|
||||
reg_gio_rw_intr_mask intr_mask;
|
||||
|
|
@ -943,11 +940,13 @@ virtual_gpio_init(void)
|
|||
|
||||
/* main driver initialization routine, called from mem.c */
|
||||
|
||||
static __init int
|
||||
gpio_init(void)
|
||||
static int __init gpio_init(void)
|
||||
{
|
||||
int res;
|
||||
|
||||
printk(KERN_INFO "ETRAX FS GPIO driver v2.7, (c) 2003-2008 "
|
||||
"Axis Communications AB\n");
|
||||
|
||||
/* do the formalities */
|
||||
|
||||
res = register_chrdev(GPIO_MAJOR, gpio_name, &gpio_fops);
|
||||
|
|
@ -963,11 +962,12 @@ gpio_init(void)
|
|||
CRIS_LED_DISK_READ(0);
|
||||
CRIS_LED_DISK_WRITE(0);
|
||||
|
||||
printk(KERN_INFO "ETRAX FS GPIO driver v2.6, (c) 2003-2007 "
|
||||
"Axis Communications AB\n");
|
||||
if (request_irq(GIO_INTR_VECT, gpio_interrupt,
|
||||
IRQF_SHARED | IRQF_DISABLED, "gpio", &alarmlist))
|
||||
int res2 = request_irq(GIO_INTR_VECT, gpio_interrupt,
|
||||
IRQF_SHARED | IRQF_DISABLED, "gpio", &alarmlist);
|
||||
if (res2) {
|
||||
printk(KERN_ERR "err: irq for gpio\n");
|
||||
return res2;
|
||||
}
|
||||
|
||||
/* No IRQs by default. */
|
||||
REG_WR_INT(gio, regi_gio, rw_intr_pins, 0);
|
||||
|
|
|
|||
Loading…
Reference in a new issue