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ARM: S3C24XX: Add SPI bus 1 on GPD8 through GPD10

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Add configuration callback for SPI bus 1 on GPD[8..10] and ensure the
correct GPIO configuration register definitions in regs-gpio.h

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Ben Dooks 2009-08-03 17:26:50 +01:00 committed by Ben Dooks
parent d91e9a7ab9
commit a2c195fdde
5 changed files with 51 additions and 1 deletions
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4
arch/arm/mach-s3c2410/include/mach/regs-gpio.h
View file

@ -328,13 +328,15 @@
#define S3C2410_GPD8_VD16 (0x02 << 16)
#define S3C2400_GPD8_TOUT3 (0x02 << 16)
#define S3C2440_GPD8_SPIMISO1 (0x03 << 16)
#define S3C2410_GPD9_VD17 (0x02 << 18)
#define S3C2400_GPD9_TCLK0 (0x02 << 18)
#define S3C2410_GPD9_MASK (0x03 << 18)
#define S3C2440_GPD9_SPIMOSI1 (0x03 << 18)
#define S3C2410_GPD10_VD18 (0x02 << 20)
#define S3C2400_GPD10_nWAIT (0x02 << 20)
#define S3C2440_GPD10_SPICLK1 (0x03 << 20)
#define S3C2410_GPD11_VD19 (0x02 << 22)

3
arch/arm/mach-s3c2410/include/mach/spi.h
View file

@ -30,4 +30,7 @@ extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
int enable);
extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,
int enable);
#endif /* __ASM_ARCH_SPI_H */

6
arch/arm/plat-s3c24xx/Kconfig
View file

@ -105,6 +105,12 @@ config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7
SPI GPIO configuration code for BUS 1 when connected to
GPG5, GPG6 and GPG7.
config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10
bool
help
SPI GPIO configuration code for BUS 1 when connected to
GPD8, GPD9 and GPD10.
# common code for s3c24xx based machines, such as the SMDKs.
config MACH_SMDK

1
arch/arm/plat-s3c24xx/Makefile
View file

@ -41,6 +41,7 @@ obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o
obj-$(CONFIG_S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13) += spi-bus0-gpe11_12_13.o
obj-$(CONFIG_S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7) += spi-bus1-gpg5_6_7.o
obj-$(CONFIG_S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10) += spi-bus1-gpd8_9_10.o
# machine common support

38
arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c Normal file
View file

@ -0,0 +1,38 @@
/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpd8_9_10.c
*
* Copyright (c) 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C24XX SPI - gpio configuration for bus 1 on gpd8,9,10
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License.
*/
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <mach/spi.h>
#include <mach/regs-gpio.h>
void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,
int enable)
{
printk(KERN_INFO "%s(%d)\n", __func__, enable);
if (enable) {
s3c2410_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1);
s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1);
s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1);
s3c2410_gpio_pullup(S3C2410_GPD(10), 0);
s3c2410_gpio_pullup(S3C2410_GPD(9), 0);
} else {
s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT);
s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT);
s3c2410_gpio_pullup(S3C2410_GPD(10), 1);
s3c2410_gpio_pullup(S3C2410_GPD(9), 1);
s3c2410_gpio_pullup(S3C2410_GPD(8), 1);
}
}