iio: adc: ti-ads8688: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 3e87e78383 ("iio: adc: Add TI ADS8688")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-39-jic23@kernel.org
This commit is contained in:
Jonathan Cameron 2022-05-08 18:56:18 +01:00
parent 8966b11e5a
commit a2105d87eb

View file

@ -71,7 +71,7 @@ struct ads8688_state {
union {
__be32 d32;
u8 d8[4];
} data[2] ____cacheline_aligned;
} data[2] __aligned(IIO_DMA_MINALIGN);
};
enum ads8688_id {