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mmc: rtsx_pci: Add SD Express mode support for RTS5261

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RTS5261 support SD mode and PCIe/NVMe mode. The workflow is as follows.
1.RTS5261 work in SD mode and set MMC_CAPS2_SD_EXP flag.
2.If card is plugged in, Host send CMD8 to ask card's PCIe availability.
3.If the card has PCIe availability and WP is not set, init_sd_express() will be invoked,
RTS5261 switch to PCIe/NVMe mode.
4.Mmc driver handover it to NVMe driver.
5.If card is unplugged, RTS5261 will switch to SD mode.

Signed-off-by: Rui Feng <rui_feng@realsil.com.cn>
Link: https://lore.kernel.org/r/1603936703-3403-1-git-send-email-rui_feng@realsil.com.cn
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Rui Feng 2020-10-29 09:58:23 +08:00 committed by Ulf Hansson
parent 5afe802132
commit 9ff43c7be9
1 changed files with 58 additions and 0 deletions
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58
drivers/mmc/host/rtsx_pci_sdmmc.c
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@ -895,7 +895,9 @@ static int sd_set_bus_width(struct realtek_pci_sdmmc *host,
static int sd_power_on(struct realtek_pci_sdmmc *host)
{
struct rtsx_pcr *pcr = host->pcr;
struct mmc_host *mmc = host->mmc;
int err;
u32 val;
if (host->power_state == SDMMC_POWER_ON)
return 0;
@ -922,6 +924,21 @@ static int sd_power_on(struct realtek_pci_sdmmc *host)
if (err < 0)
return err;
if (PCI_PID(pcr) == PID_5261) {
if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)
mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V;
/*
* HW read wp status when resuming from S3/S4,
* and then picks SD legacy interface if it's set
* in read-only mode.
*/
val = rtsx_pci_readl(pcr, RTSX_BIPR);
if (val & SD_WRITE_PROTECT) {
pcr->extra_caps &= ~EXTRA_CAPS_SD_EXPRESS;
mmc->caps2 &= ~(MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V);
}
}
host->power_state = SDMMC_POWER_ON;
return 0;
}
@ -1308,6 +1325,44 @@ static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
return err;
}
static int sdmmc_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios)
{
u32 relink_time;
struct realtek_pci_sdmmc *host = mmc_priv(mmc);
struct rtsx_pcr *pcr = host->pcr;
/* Set relink_time for changing to PCIe card */
relink_time = 0x8FFF;
rtsx_pci_write_register(pcr, 0xFF01, 0xFF, relink_time);
rtsx_pci_write_register(pcr, 0xFF02, 0xFF, relink_time >> 8);
rtsx_pci_write_register(pcr, 0xFF03, 0x01, relink_time >> 16);
rtsx_pci_write_register(pcr, PETXCFG, 0x80, 0x80);
rtsx_pci_write_register(pcr, LDO_VCC_CFG0,
RTS5261_LDO1_OCP_THD_MASK,
pcr->option.sd_800mA_ocp_thd);
if (pcr->ops->disable_auto_blink)
pcr->ops->disable_auto_blink(pcr);
/* For PCIe/NVMe mode can't enter delink issue */
pcr->hw_param.interrupt_en &= ~(SD_INT_EN);
rtsx_pci_writel(pcr, RTSX_BIER, pcr->hw_param.interrupt_en);
rtsx_pci_write_register(pcr, RTS5260_AUTOLOAD_CFG4,
RTS5261_AUX_CLK_16M_EN, RTS5261_AUX_CLK_16M_EN);
rtsx_pci_write_register(pcr, RTS5261_FW_CFG0,
RTS5261_FW_ENTER_EXPRESS, RTS5261_FW_ENTER_EXPRESS);
rtsx_pci_write_register(pcr, RTS5261_FW_CFG1,
RTS5261_MCU_BUS_SEL_MASK | RTS5261_MCU_CLOCK_SEL_MASK
| RTS5261_MCU_CLOCK_GATING | RTS5261_DRIVER_ENABLE_FW,
RTS5261_MCU_CLOCK_SEL_16M | RTS5261_MCU_CLOCK_GATING
| RTS5261_DRIVER_ENABLE_FW);
host->eject = true;
return 0;
}
static const struct mmc_host_ops realtek_pci_sdmmc_ops = {
.pre_req = sdmmc_pre_req,
.post_req = sdmmc_post_req,
@ -1317,6 +1372,7 @@ static const struct mmc_host_ops realtek_pci_sdmmc_ops = {
.get_cd = sdmmc_get_cd,
.start_signal_voltage_switch = sdmmc_switch_voltage,
.execute_tuning = sdmmc_execute_tuning,
.init_sd_express = sdmmc_init_sd_express,
};
static void init_extra_caps(struct realtek_pci_sdmmc *host)
@ -1338,6 +1394,8 @@ static void init_extra_caps(struct realtek_pci_sdmmc *host)
mmc->caps |= MMC_CAP_8_BIT_DATA;
if (pcr->extra_caps & EXTRA_CAPS_NO_MMC)
mmc->caps2 |= MMC_CAP2_NO_MMC;
if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)
mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V;
}
static void realtek_init_host(struct realtek_pci_sdmmc *host)