This pull request contains Broadcom ARM64-based SoCs Device Tree changes

for 6.4, please pull the following:
 
 - Rob fixes the GICv3 ITS node name for the Stingray platforms
 
 - William adds the new-style High Speed SPI controller nodes to the BCA
   SocS
 
 - Rafal fixes the NAND controller interrupt name for BCM4908, LED
   node(s) and procmon for BCM4908. He also adds support for the USB
   ports, and declares USB triggered LEDs for the Netgear R8000P and
   TP-Link C2300.
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Merge tag 'arm-soc/for-6.4/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 6.4, please pull the following:

- Rob fixes the GICv3 ITS node name for the Stingray platforms

- William adds the new-style High Speed SPI controller nodes to the BCA
  SocS

- Rafal fixes the NAND controller interrupt name for BCM4908, LED
  node(s) and procmon for BCM4908. He also adds support for the USB
  ports, and declares USB triggered LEDs for the Netgear R8000P and
  TP-Link C2300.

* tag 'arm-soc/for-6.4/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcmbca: bcm4908: add TP-Link C2300 USB LED triggers
  arm64: dts: broadcom: bcmbca: bcm4908: add Netgear R8000P USB LED triggers
  arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports
  arm64: dts: broadcom: bcmbca: bcm4908: fix procmon nodename
  arm64: dts: broadcom: bcmbca: bcm4908: fix LED nodenames
  arm64: dts: broadcom: bcmbca: bcm4908: fix NAND interrupt name
  arm64: dts: broadcom: bcmbca: Add spi controller node
  arm64: dts: broadcom: stringray: Fix GICv3 ITS node name

Link: https://lore.kernel.org/r/20230410232606.1917803-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-04-14 17:58:26 +02:00
commit 9e0dabbd9b
18 changed files with 216 additions and 9 deletions

View file

@ -58,12 +58,16 @@ led-usb2 {
function = "usb2";
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>;
linux,default-trigger = "usbport";
};
led-usb3 {
function = "usb3";
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>;
linux,default-trigger = "usbport";
};
led-wifi {

View file

@ -64,12 +64,16 @@ led-usb2 {
function = "usb2";
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>;
linux,default-trigger = "usbport";
};
led-usb3 {
function = "usbd3";
function = "usb3";
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>;
linux,default-trigger = "usbport";
};
led-brightness {

View file

@ -120,7 +120,7 @@ ethernet-phy@3 {
};
&leds {
led-power@11 {
led@11 {
reg = <0x11>;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_WHITE>;
@ -130,7 +130,7 @@ led-power@11 {
pinctrl-0 = <&pins_led_17_a>;
};
led-wan-red@12 {
led@12 {
reg = <0x12>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_RED>;
@ -139,7 +139,7 @@ led-wan-red@12 {
pinctrl-0 = <&pins_led_18_a>;
};
led-wps@14 {
led@14 {
reg = <0x14>;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
@ -148,7 +148,7 @@ led-wps@14 {
pinctrl-0 = <&pins_led_20_a>;
};
led-wan-white@15 {
led@15 {
reg = <0x15>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_WHITE>;
@ -157,7 +157,7 @@ led-wan-white@15 {
pinctrl-0 = <&pins_led_21_a>;
};
led-lan@19 {
led@19 {
reg = <0x19>;
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_WHITE>;

View file

@ -107,6 +107,12 @@ periph_clk: periph_clk {
clock-frequency = <50000000>;
clock-output-names = "periph";
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
};
soc {
@ -142,6 +148,19 @@ ehci: usb@c300 {
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_phy PHY_TYPE_USB2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
ehci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
ehci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
ohci: usb@c400 {
@ -150,6 +169,19 @@ ohci: usb@c400 {
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_phy PHY_TYPE_USB2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
ohci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
ohci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
xhci: usb@d000 {
@ -158,6 +190,19 @@ xhci: usb@d000 {
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_phy PHY_TYPE_USB3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
xhci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
xhci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
bus@80000 {
@ -254,7 +299,7 @@ phy12: ethernet-phy@c {
};
};
procmon: syscon@280000 {
procmon: bus@280000 {
compatible = "simple-bus";
reg = <0x280000 0x1000>;
ranges;
@ -531,6 +576,18 @@ leds: leds@800 {
#size-cells = <0>;
};
hsspi: spi@1000{
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0";
reg = <0x1000 0x600>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
nand-controller@1800 {
#address-cells = <1>;
#size-cells = <0>;
@ -538,7 +595,7 @@ nand-controller@1800 {
reg = <0x1800 0x600>, <0x2000 0x10>;
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "nand";
interrupt-names = "nand_ctlrdy";
status = "okay";
nandcs: nand@0 {

View file

@ -79,6 +79,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@ -86,6 +87,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
};
};
psci {
@ -117,6 +124,19 @@ bus@ff800000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
hsspi: spi@1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1";
reg = <0x1000 0x600>, <0x2610 0x4>;
reg-names = "hsspi", "spim-ctrl";
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;

View file

@ -60,6 +60,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@ -67,6 +68,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
};
};
psci {
@ -99,6 +106,18 @@ bus@ff800000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
hsspi: spi@1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0";
reg = <0x1000 0x600>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;

View file

@ -79,6 +79,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@ -86,6 +87,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
};
psci {
@ -117,6 +124,18 @@ bus@ff800000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
hsspi: spi@1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0";
reg = <0x1000 0x600>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;

View file

@ -79,6 +79,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@ -86,6 +87,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
};
};
psci {
@ -117,6 +124,19 @@ bus@ff800000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
hsspi: spi@1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1";
reg = <0x1000 0x600>, <0x2610 0x4>;
reg-names = "hsspi", "spim-ctrl";
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;

View file

@ -60,6 +60,12 @@ periph_clk:periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
};
psci {
@ -100,5 +106,17 @@ uart0: serial@640 {
clock-names = "refclk";
status = "disabled";
};
hsspi: spi@1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0";
reg = <0x1000 0x600>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
};
};

View file

@ -78,6 +78,12 @@ periph_clk:periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
hsspi_pll: hsspi-pll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
};
psci {
@ -137,5 +143,17 @@ uart0: serial@640 {
clock-names = "refclk";
status = "disabled";
};
hsspi: spi@1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0";
reg = <0x1000 0x600>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsspi_pll &hsspi_pll>;
clock-names = "hsspi", "pll";
num-cs = <8>;
status = "disabled";
};
};
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
&hsspi {
status = "okay";
};

View file

@ -178,7 +178,7 @@ gic: interrupt-controller@2c00000 {
<0x02e00000 0x600000>; /* GICR */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
gic_its: gic-its@63c20000 {
gic_its: msi-controller@63c20000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;