system/linux
system/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux synced 2024-10-06 19:34:19 +00:00
Code Issues Packages Projects Releases Wiki Activity

powerpc/xive: Add a name to the IRQ domain

Browse source 
We hope one day to handle multiple irq_domain in the XIVE driver.
Start simple by setting the name using the DT node.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201210171450.1933725-6-clg@kaod.org
This commit is contained in:
Cédric Le Goater 2020-12-10 18:14:42 +01:00 committed by Michael Ellerman
parent e2cf43d595
commit 9dfe4b14df
4 changed files with 9 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
arch/powerpc/sysdev/xive/common.c
View file

@ -1310,9 +1310,9 @@ static const struct irq_domain_ops xive_irq_domain_ops = {
.xlate = xive_irq_domain_xlate,
};
static void __init xive_init_host(void)
static void __init xive_init_host(struct device_node *np)
{
xive_irq_domain = irq_domain_add_nomap(NULL, XIVE_MAX_IRQ,
xive_irq_domain = irq_domain_add_nomap(np, XIVE_MAX_IRQ,
&xive_irq_domain_ops, NULL);
if (WARN_ON(xive_irq_domain == NULL))
return;
@ -1513,8 +1513,8 @@ void xive_shutdown(void)
xive_ops->shutdown();
}
bool __init xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,
u8 max_prio)
bool __init xive_core_init(struct device_node *np, const struct xive_ops *ops,
void __iomem *area, u32 offset, u8 max_prio)
{
xive_tima = area;
xive_tima_offset = offset;
@ -1525,7 +1525,7 @@ bool __init xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 o
__xive_enabled = true;
pr_devel("Initializing host..\n");
xive_init_host();
xive_init_host(np);
pr_devel("Initializing boot CPU..\n");

2
arch/powerpc/sysdev/xive/native.c
View file

@ -622,7 +622,7 @@ bool __init xive_native_init(void)
xive_native_setup_pools();
/* Initialize XIVE core with our backend */
if (!xive_core_init(&xive_native_ops, tima, TM_QW3_HV_PHYS,
if (!xive_core_init(np, &xive_native_ops, tima, TM_QW3_HV_PHYS,
max_prio)) {
opal_xive_reset(OPAL_XIVE_MODE_EMU);
return false;

2
arch/powerpc/sysdev/xive/spapr.c
View file

@ -857,7 +857,7 @@ bool __init xive_spapr_init(void)
}
/* Initialize XIVE core with our backend */
if (!xive_core_init(&xive_spapr_ops, tima, TM_QW1_OS, max_prio))
if (!xive_core_init(np, &xive_spapr_ops, tima, TM_QW1_OS, max_prio))
return false;
pr_info("Using %dkB queues\n", 1 << (xive_queue_shift - 10));

4
arch/powerpc/sysdev/xive/xive-internal.h
View file

@ -63,8 +63,8 @@ struct xive_ops {
const char *name;
};
bool xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,
u8 max_prio);
bool xive_core_init(struct device_node *np, const struct xive_ops *ops,
void __iomem *area, u32 offset, u8 max_prio);
__be32 *xive_queue_page_alloc(unsigned int cpu, u32 queue_shift);
int xive_core_debug_init(void);