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https://github.com/torvalds/linux
synced 2024-09-06 18:01:05 +00:00
ASoC: cs35l56: Move runtime suspend/resume to shared library
The majority of runtime_suspend and runtime_resume handling doesn't have anything specific to the ASoC driver, so can be shared by the HDA driver. Move this code into the shared library. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230721132120.5523-6-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -281,6 +281,8 @@ void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire);
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int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq);
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irqreturn_t cs35l56_irq(int irq, void *data);
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int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base);
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int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base);
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int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire);
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int cs35l56_get_bclk_freq_id(unsigned int freq);
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void cs35l56_fill_supply_names(struct regulator_bulk_data *data);
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@ -424,7 +424,7 @@ static int __maybe_unused cs35l56_sdw_runtime_suspend(struct device *dev)
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if (!cs35l56->base.init_done)
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return 0;
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return cs35l56_runtime_suspend(dev);
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return cs35l56_runtime_suspend_common(&cs35l56->base);
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}
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static int __maybe_unused cs35l56_sdw_runtime_resume(struct device *dev)
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@ -441,7 +441,7 @@ static int __maybe_unused cs35l56_sdw_runtime_resume(struct device *dev)
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if (ret < 0)
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return ret;
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ret = cs35l56_runtime_resume_common(cs35l56);
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ret = cs35l56_runtime_resume_common(&cs35l56->base, true);
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if (ret)
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return ret;
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@ -403,6 +403,124 @@ int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base)
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}
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EXPORT_SYMBOL_NS_GPL(cs35l56_is_fw_reload_needed, SND_SOC_CS35L56_SHARED);
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static const struct reg_sequence cs35l56_hibernate_seq[] = {
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/* This must be the last register access */
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REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_HIBERNATE_NOW),
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};
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static const struct reg_sequence cs35l56_hibernate_wake_seq[] = {
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REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_WAKEUP),
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};
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int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base)
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{
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unsigned int val;
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int ret;
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if (!cs35l56_base->init_done)
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return 0;
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/* Firmware must have entered a power-save state */
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ret = regmap_read_poll_timeout(cs35l56_base->regmap,
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CS35L56_TRANSDUCER_ACTUAL_PS,
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val, (val >= CS35L56_PS3),
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CS35L56_PS3_POLL_US,
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CS35L56_PS3_TIMEOUT_US);
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if (ret)
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dev_warn(cs35l56_base->dev, "PS3 wait failed: %d\n", ret);
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/* Clear BOOT_DONE so it can be used to detect a reboot */
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regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_4, CS35L56_OTP_BOOT_DONE_MASK);
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if (!cs35l56_base->can_hibernate) {
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regcache_cache_only(cs35l56_base->regmap, true);
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dev_dbg(cs35l56_base->dev, "Suspended: no hibernate");
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return 0;
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}
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/*
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* Enable auto-hibernate. If it is woken by some other wake source
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* it will automatically return to hibernate.
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*/
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cs35l56_mbox_send(cs35l56_base, CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE);
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/*
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* Must enter cache-only first so there can't be any more register
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* accesses other than the controlled hibernate sequence below.
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*/
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regcache_cache_only(cs35l56_base->regmap, true);
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regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
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cs35l56_hibernate_seq,
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ARRAY_SIZE(cs35l56_hibernate_seq));
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dev_dbg(cs35l56_base->dev, "Suspended: hibernate");
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return 0;
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}
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EXPORT_SYMBOL_NS_GPL(cs35l56_runtime_suspend_common, SND_SOC_CS35L56_SHARED);
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int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire)
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{
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unsigned int val;
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int ret;
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if (!cs35l56_base->init_done)
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return 0;
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if (!cs35l56_base->can_hibernate)
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goto out_sync;
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if (!is_soundwire) {
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/*
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* Dummy transaction to trigger I2C/SPI auto-wake. This will NAK on I2C.
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* Must be done before releasing cache-only.
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*/
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regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
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cs35l56_hibernate_wake_seq,
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ARRAY_SIZE(cs35l56_hibernate_wake_seq));
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usleep_range(CS35L56_CONTROL_PORT_READY_US,
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CS35L56_CONTROL_PORT_READY_US + 400);
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}
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out_sync:
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regcache_cache_only(cs35l56_base->regmap, false);
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ret = cs35l56_wait_for_firmware_boot(cs35l56_base);
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if (ret) {
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dev_err(cs35l56_base->dev, "Hibernate wake failed: %d\n", ret);
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goto err;
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}
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ret = cs35l56_mbox_send(cs35l56_base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
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if (ret)
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goto err;
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/* BOOT_DONE will be 1 if the amp reset */
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regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_4, &val);
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if (val & CS35L56_OTP_BOOT_DONE_MASK) {
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dev_dbg(cs35l56_base->dev, "Registers reset in suspend\n");
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regcache_mark_dirty(cs35l56_base->regmap);
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}
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regcache_sync(cs35l56_base->regmap);
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dev_dbg(cs35l56_base->dev, "Resumed");
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return 0;
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err:
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regmap_write(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
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CS35L56_MBOX_CMD_HIBERNATE_NOW);
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regcache_cache_only(cs35l56_base->regmap, true);
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return ret;
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}
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EXPORT_SYMBOL_NS_GPL(cs35l56_runtime_resume_common, SND_SOC_CS35L56_SHARED);
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const struct cs_dsp_region cs35l56_dsp1_regions[] = {
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{ .type = WMFW_HALO_PM_PACKED, .base = CS35L56_DSP1_PMEM_0 },
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{ .type = WMFW_HALO_XM_PACKED, .base = CS35L56_DSP1_XMEM_PACKED_0 },
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@ -849,132 +849,20 @@ static const struct snd_soc_component_driver soc_component_dev_cs35l56 = {
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.suspend_bias_off = 1, /* see cs35l56_system_resume() */
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};
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static const struct reg_sequence cs35l56_hibernate_seq[] = {
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/* This must be the last register access */
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REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_HIBERNATE_NOW),
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};
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static const struct reg_sequence cs35l56_hibernate_wake_seq[] = {
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REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_WAKEUP),
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};
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int cs35l56_runtime_suspend(struct device *dev)
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static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev)
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{
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struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
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unsigned int val;
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int ret;
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if (!cs35l56->base.init_done)
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return 0;
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/* Firmware must have entered a power-save state */
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ret = regmap_read_poll_timeout(cs35l56->base.regmap,
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CS35L56_TRANSDUCER_ACTUAL_PS,
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val, (val >= CS35L56_PS3),
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CS35L56_PS3_POLL_US,
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CS35L56_PS3_TIMEOUT_US);
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if (ret)
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dev_warn(cs35l56->base.dev, "PS3 wait failed: %d\n", ret);
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/* Clear BOOT_DONE so it can be used to detect a reboot */
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regmap_write(cs35l56->base.regmap, CS35L56_IRQ1_EINT_4, CS35L56_OTP_BOOT_DONE_MASK);
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if (!cs35l56->base.can_hibernate) {
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regcache_cache_only(cs35l56->base.regmap, true);
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dev_dbg(dev, "Suspended: no hibernate");
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return 0;
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}
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/*
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* Enable auto-hibernate. If it is woken by some other wake source
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* it will automatically return to hibernate.
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*/
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cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE);
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/*
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* Must enter cache-only first so there can't be any more register
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* accesses other than the controlled hibernate sequence below.
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*/
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regcache_cache_only(cs35l56->base.regmap, true);
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regmap_multi_reg_write_bypassed(cs35l56->base.regmap,
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cs35l56_hibernate_seq,
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ARRAY_SIZE(cs35l56_hibernate_seq));
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dev_dbg(dev, "Suspended: hibernate");
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return 0;
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return cs35l56_runtime_suspend_common(&cs35l56->base);
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}
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EXPORT_SYMBOL_NS_GPL(cs35l56_runtime_suspend, SND_SOC_CS35L56_CORE);
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static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev)
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{
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struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
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if (!cs35l56->base.init_done)
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return 0;
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return cs35l56_runtime_resume_common(cs35l56);
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return cs35l56_runtime_resume_common(&cs35l56->base, false);
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}
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int cs35l56_runtime_resume_common(struct cs35l56_private *cs35l56)
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{
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unsigned int val;
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int ret;
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if (!cs35l56->base.can_hibernate)
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goto out_sync;
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if (!cs35l56->sdw_peripheral) {
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/*
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* Dummy transaction to trigger I2C/SPI auto-wake. This will NAK on I2C.
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* Must be done before releasing cache-only.
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*/
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regmap_multi_reg_write_bypassed(cs35l56->base.regmap,
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cs35l56_hibernate_wake_seq,
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ARRAY_SIZE(cs35l56_hibernate_wake_seq));
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usleep_range(CS35L56_CONTROL_PORT_READY_US,
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CS35L56_CONTROL_PORT_READY_US + 400);
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}
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out_sync:
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regcache_cache_only(cs35l56->base.regmap, false);
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ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
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if (ret) {
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dev_err(cs35l56->base.dev, "Hibernate wake failed: %d\n", ret);
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goto err;
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}
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ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
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if (ret)
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goto err;
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/* BOOT_DONE will be 1 if the amp reset */
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regmap_read(cs35l56->base.regmap, CS35L56_IRQ1_EINT_4, &val);
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if (val & CS35L56_OTP_BOOT_DONE_MASK) {
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dev_dbg(cs35l56->base.dev, "Registers reset in suspend\n");
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regcache_mark_dirty(cs35l56->base.regmap);
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}
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regcache_sync(cs35l56->base.regmap);
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dev_dbg(cs35l56->base.dev, "Resumed");
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return 0;
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err:
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regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
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CS35L56_MBOX_CMD_HIBERNATE_NOW);
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regcache_cache_only(cs35l56->base.regmap, true);
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return ret;
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}
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EXPORT_SYMBOL_NS_GPL(cs35l56_runtime_resume_common, SND_SOC_CS35L56_CORE);
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int cs35l56_system_suspend(struct device *dev)
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{
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struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
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@ -1414,7 +1302,7 @@ void cs35l56_remove(struct cs35l56_private *cs35l56)
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EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE);
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const struct dev_pm_ops cs35l56_pm_ops_i2c_spi = {
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SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend, cs35l56_runtime_resume_i2c_spi, NULL)
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SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL)
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SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume)
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LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
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NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq)
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@ -55,8 +55,6 @@ struct cs35l56_private {
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extern const struct dev_pm_ops cs35l56_pm_ops_i2c_spi;
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int cs35l56_runtime_suspend(struct device *dev);
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int cs35l56_runtime_resume_common(struct cs35l56_private *cs35l56);
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int cs35l56_system_suspend(struct device *dev);
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int cs35l56_system_suspend_late(struct device *dev);
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int cs35l56_system_suspend_no_irq(struct device *dev);
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