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drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too

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Copy&pasted from the vlv setup code. According to docs, we need that
on ivb, too.

v2: Use new masked bit handling macros.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2012-04-24 16:00:21 +02:00
parent 6b26c86d61
commit 97e1930f09
1 changed files with 4 additions and 0 deletions
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4
drivers/gpu/drm/i915/intel_pm.c
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@ -2776,6 +2776,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
}
gen7_setup_fixed_func_scheduler(dev_priv);
/* WaDisable4x2SubspanOptimization */
I915_WRITE(CACHE_MODE_1,
_MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
}
static void valleyview_init_clock_gating(struct drm_device *dev)