mirror of
https://github.com/torvalds/linux
synced 2024-09-06 18:01:05 +00:00
ppc: move exports to definitions
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
This commit is contained in:
parent
4dd1837d75
commit
9445aa1a30
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@ -1,5 +1,6 @@
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generic-y += clkdev.h
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generic-y += div64.h
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generic-y += export.h
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generic-y += irq_regs.h
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generic-y += irq_work.h
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generic-y += local64.h
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@ -91,10 +91,6 @@ obj-$(CONFIG_RELOCATABLE) += reloc_$(CONFIG_WORD_SIZE).o
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obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
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obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
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obj-$(CONFIG_KGDB) += kgdb.o
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obj-$(CONFIG_MODULES) += ppc_ksyms.o
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ifeq ($(CONFIG_PPC32),y)
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obj-$(CONFIG_MODULES) += ppc_ksyms_32.o
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endif
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obj-$(CONFIG_BOOTX_TEXT) += btext.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_KPROBES) += kprobes.o
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@ -33,6 +33,7 @@
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#include <asm/unistd.h>
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#include <asm/ftrace.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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/*
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* MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
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@ -1359,6 +1360,7 @@ _GLOBAL(_mcount)
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MCOUNT_RESTORE_FRAME
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bctr
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#endif
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EXPORT_SYMBOL(_mcount)
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_GLOBAL(ftrace_stub)
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blr
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@ -38,6 +38,7 @@
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#include <asm/context_tracking.h>
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#include <asm/tm.h>
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#include <asm/ppc-opcode.h>
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#include <asm/export.h>
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/*
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* System calls.
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@ -1180,6 +1181,7 @@ _GLOBAL(enter_prom)
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#ifdef CONFIG_DYNAMIC_FTRACE
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_GLOBAL(mcount)
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_GLOBAL(_mcount)
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EXPORT_SYMBOL(_mcount)
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mflr r12
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mtctr r12
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mtlr r0
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@ -1416,6 +1418,7 @@ livepatch_handler:
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#else
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_GLOBAL_TOC(_mcount)
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EXPORT_SYMBOL(_mcount)
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/* Taken from output of objdump from lib64/glibc */
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mflr r3
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ld r11, 0(r1)
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@ -16,6 +16,7 @@
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#include <asm/ppc_asm.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-offsets.h>
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#include <asm/export.h>
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#ifndef CONFIG_PPC64
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/* epapr_ev_idle() was derived from e500_idle() */
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@ -53,3 +54,4 @@ epapr_hypercall_start:
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nop
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nop
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blr
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EXPORT_SYMBOL(epapr_hypercall_start)
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@ -24,6 +24,7 @@
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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#ifdef CONFIG_VSX
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#define __REST_32FPVSRS(n,c,base) \
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@ -85,6 +86,7 @@ _GLOBAL(load_fp_state)
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MTFSF_L(fr0)
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REST_32FPVSRS(0, R4, R3)
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blr
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EXPORT_SYMBOL(load_fp_state)
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/*
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* Store FP state into memory, including FPSCR
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@ -95,6 +97,7 @@ _GLOBAL(store_fp_state)
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mffs fr0
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stfd fr0,FPSTATE_FPSCR(r3)
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blr
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EXPORT_SYMBOL(store_fp_state)
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/*
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* This task wants to use the FPU now.
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@ -34,6 +34,7 @@
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#include <asm/ptrace.h>
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#include <asm/bug.h>
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#include <asm/kvm_book3s_asm.h>
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#include <asm/export.h>
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/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
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#define LOAD_BAT(n, reg, RA, RB) \
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@ -739,6 +740,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
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.globl mol_trampoline
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.set mol_trampoline, i0x2f00
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EXPORT_SYMBOL(mol_trampoline)
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. = 0x3000
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@ -1048,6 +1050,7 @@ _ENTRY(switch_mmu_context)
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4: trap
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EMIT_BUG_ENTRY 4b,__FILE__,__LINE__,0
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blr
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EXPORT_SYMBOL(switch_mmu_context)
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/*
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* An undocumented "feature" of 604e requires that the v bit
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@ -1275,6 +1278,7 @@ sdata:
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.globl empty_zero_page
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empty_zero_page:
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.space 4096
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EXPORT_SYMBOL(empty_zero_page)
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.globl swapper_pg_dir
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swapper_pg_dir:
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@ -1288,6 +1292,7 @@ intercept_table:
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.long 0, 0, 0, 0, 0, 0, 0, 0
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.long 0, 0, 0, 0, 0, 0, 0, 0
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.long 0, 0, 0, 0, 0, 0, 0, 0
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EXPORT_SYMBOL(intercept_table)
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/* Room for two PTE pointers, usually the kernel and current user pointers
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* to their respective root page table.
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@ -41,6 +41,7 @@
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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/* As with the other PowerPC ports, it is expected that when code
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* execution begins here, the following registers contain valid, yet
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@ -971,6 +972,7 @@ sdata:
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.globl empty_zero_page
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empty_zero_page:
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.space 4096
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EXPORT_SYMBOL(empty_zero_page)
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.globl swapper_pg_dir
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swapper_pg_dir:
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.space PGD_TABLE_SIZE
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@ -39,6 +39,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/synch.h>
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#include <asm/export.h>
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#include "head_booke.h"
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.globl empty_zero_page
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empty_zero_page:
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.space PAGE_SIZE
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EXPORT_SYMBOL(empty_zero_page)
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/*
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* To support >32-bit physical addresses, we use an 8KB pgdir.
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@ -42,6 +42,7 @@
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#include <asm/hw_irq.h>
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#include <asm/cputhreads.h>
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#include <asm/ppc-opcode.h>
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#include <asm/export.h>
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/* The physical memory is laid out such that the secondary processor
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* spin code sits at 0x0000...0x00ff. On server, the vectors follow
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.globl empty_zero_page
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empty_zero_page:
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.space PAGE_SIZE
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EXPORT_SYMBOL(empty_zero_page)
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@ -31,6 +31,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/fixmap.h>
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#include <asm/export.h>
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/* Macro to make the code more readable. */
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#ifdef CONFIG_8xx_CPU6
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.align PAGE_SHIFT
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empty_zero_page:
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.space PAGE_SIZE
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EXPORT_SYMBOL(empty_zero_page)
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.globl swapper_pg_dir
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swapper_pg_dir:
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#include <asm/asm-offsets.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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#include "head_booke.h"
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/* As with the other PowerPC ports, it is expected that when code
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.globl empty_zero_page
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empty_zero_page:
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.space 4096
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EXPORT_SYMBOL(empty_zero_page)
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.globl swapper_pg_dir
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swapper_pg_dir:
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.space PGD_TABLE_SIZE
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@ -18,6 +18,7 @@
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#include <asm/unistd.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-offsets.h>
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#include <asm/export.h>
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.text
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@ -118,3 +119,4 @@ _GLOBAL(longjmp)
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_GLOBAL(current_stack_pointer)
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PPC_LL r3,0(r1)
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blr
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EXPORT_SYMBOL(current_stack_pointer)
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@ -33,6 +33,7 @@
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#include <asm/kexec.h>
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#include <asm/bug.h>
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#include <asm/ptrace.h>
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#include <asm/export.h>
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.text
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@ -319,6 +320,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
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#endif /* CONFIG_4xx */
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isync
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blr
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EXPORT_SYMBOL(flush_instruction_cache)
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#endif /* CONFIG_PPC_8xx */
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/*
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sync /* additional sync needed on g4 */
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isync
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blr
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EXPORT_SYMBOL(flush_icache_range)
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/*
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* Flush a particular page from the data cache to RAM.
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* Note: this is necessary because the instruction cache does *not*
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stw r7,8(r3); \
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stw r8,12(r3); \
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stwu r9,16(r3)
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EXPORT_SYMBOL(clear_pages)
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_GLOBAL(copy_page)
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addi r3,r3,-4
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li r0,MAX_COPY_PREFETCH
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li r11,4
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b 2b
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EXPORT_SYMBOL(copy_page)
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/*
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* Extended precision shifts.
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sraw r3,r3,r5 # MSW = MSW >> count
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or r4,r4,r7 # LSW |= t2
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blr
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EXPORT_SYMBOL(__ashrdi3)
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_GLOBAL(__ashldi3)
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subfic r6,r5,32
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slw r4,r4,r5 # LSW = LSW << count
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or r3,r3,r7 # MSW |= t2
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blr
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EXPORT_SYMBOL(__ashldi3)
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_GLOBAL(__lshrdi3)
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subfic r6,r5,32
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srw r3,r3,r5 # MSW = MSW >> count
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or r4,r4,r7 # LSW |= t2
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blr
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EXPORT_SYMBOL(__lshrdi3)
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/*
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* 64-bit comparison: __cmpdi2(s64 a, s64 b)
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bltlr
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li r3,2
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blr
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EXPORT_SYMBOL(__cmpdi2)
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/*
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* 64-bit comparison: __ucmpdi2(u64 a, u64 b)
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* Returns 0 if a < b, 1 if a == b, 2 if a > b.
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bltlr
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li r3,2
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blr
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EXPORT_SYMBOL(__ucmpdi2)
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_GLOBAL(__bswapdi2)
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rotlwi r9,r4,8
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mr r3,r9
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mr r4,r10
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blr
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EXPORT_SYMBOL(__bswapdi2)
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#ifdef CONFIG_SMP
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_GLOBAL(start_secondary_resume)
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@ -27,6 +27,7 @@
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#include <asm/kexec.h>
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#include <asm/ptrace.h>
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#include <asm/mmu.h>
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#include <asm/export.h>
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.text
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@ -110,6 +111,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
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isync
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blr
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.previous .text
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EXPORT_SYMBOL(flush_icache_range)
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/*
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* Like above, but only do the D-cache.
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*
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bdnz 0b
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sync
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blr
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EXPORT_SYMBOL(flush_dcache_range)
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/*
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* Like above, but works on non-mapped physical addresses.
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blr
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_GLOBAL(__bswapdi2)
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EXPORT_SYMBOL(__bswapdi2)
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srdi r8,r3,32
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rlwinm r7,r3,8,0xffffffff
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rlwimi r7,r3,24,0,7
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@ -56,6 +56,7 @@ static DECLARE_BITMAP(phb_bitmap, MAX_PHBS);
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/* ISA Memory physical address */
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resource_size_t isa_mem_base;
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EXPORT_SYMBOL(isa_mem_base);
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static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
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@ -32,6 +32,8 @@
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unsigned long isa_io_base = 0;
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unsigned long pci_dram_offset = 0;
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int pcibios_assign_bus_offset = 1;
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EXPORT_SYMBOL(isa_io_base);
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EXPORT_SYMBOL(pci_dram_offset);
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void pcibios_make_OF_bus_map(void);
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@ -1,37 +0,0 @@
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#include <linux/ftrace.h>
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#include <linux/mm.h>
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#include <asm/processor.h>
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#include <asm/switch_to.h>
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#include <asm/cacheflush.h>
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#include <asm/epapr_hcalls.h>
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#ifdef CONFIG_PPC64
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EXPORT_SYMBOL(flush_dcache_range);
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#endif
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EXPORT_SYMBOL(flush_icache_range);
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EXPORT_SYMBOL(empty_zero_page);
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long long __bswapdi2(long long);
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EXPORT_SYMBOL(__bswapdi2);
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#ifdef CONFIG_FUNCTION_TRACER
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EXPORT_SYMBOL(_mcount);
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#endif
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#ifdef CONFIG_PPC_FPU
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EXPORT_SYMBOL(load_fp_state);
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EXPORT_SYMBOL(store_fp_state);
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#endif
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#ifdef CONFIG_ALTIVEC
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EXPORT_SYMBOL(load_vr_state);
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EXPORT_SYMBOL(store_vr_state);
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#endif
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#ifdef CONFIG_EPAPR_PARAVIRT
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EXPORT_SYMBOL(epapr_hypercall_start);
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#endif
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EXPORT_SYMBOL(current_stack_pointer);
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@ -1,60 +0,0 @@
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#include <linux/export.h>
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#include <linux/smp.h>
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#include <asm/page.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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#include <asm/hw_irq.h>
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#include <asm/time.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/dcr.h>
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EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
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EXPORT_SYMBOL(DMA_MODE_READ);
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EXPORT_SYMBOL(DMA_MODE_WRITE);
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#if defined(CONFIG_PCI)
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EXPORT_SYMBOL(isa_io_base);
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EXPORT_SYMBOL(isa_mem_base);
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EXPORT_SYMBOL(pci_dram_offset);
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#endif
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#ifdef CONFIG_SMP
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EXPORT_SYMBOL(smp_hw_index);
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#endif
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long long __ashrdi3(long long, int);
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long long __ashldi3(long long, int);
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long long __lshrdi3(long long, int);
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int __ucmpdi2(unsigned long long, unsigned long long);
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int __cmpdi2(long long, long long);
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EXPORT_SYMBOL(__ashrdi3);
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EXPORT_SYMBOL(__ashldi3);
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EXPORT_SYMBOL(__lshrdi3);
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EXPORT_SYMBOL(__ucmpdi2);
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EXPORT_SYMBOL(__cmpdi2);
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EXPORT_SYMBOL(timer_interrupt);
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EXPORT_SYMBOL(tb_ticks_per_jiffy);
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EXPORT_SYMBOL(switch_mmu_context);
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#ifdef CONFIG_PPC_STD_MMU_32
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extern long mol_trampoline;
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EXPORT_SYMBOL(mol_trampoline); /* For MOL */
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EXPORT_SYMBOL(flush_hash_pages); /* For MOL */
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#ifdef CONFIG_SMP
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extern int mmu_hash_lock;
|
||||
EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
|
||||
#endif /* CONFIG_SMP */
|
||||
extern long *intercept_table;
|
||||
EXPORT_SYMBOL(intercept_table);
|
||||
#endif /* CONFIG_PPC_STD_MMU_32 */
|
||||
|
||||
#ifdef CONFIG_PPC_DCR_NATIVE
|
||||
EXPORT_SYMBOL(__mtdcr);
|
||||
EXPORT_SYMBOL(__mfdcr);
|
||||
#endif
|
||||
|
||||
EXPORT_SYMBOL(flush_instruction_cache);
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/cpu.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/prom.h>
|
||||
|
@ -47,11 +48,16 @@ int boot_cpuid_phys;
|
|||
EXPORT_SYMBOL_GPL(boot_cpuid_phys);
|
||||
|
||||
int smp_hw_index[NR_CPUS];
|
||||
EXPORT_SYMBOL(smp_hw_index);
|
||||
|
||||
unsigned long ISA_DMA_THRESHOLD;
|
||||
unsigned int DMA_MODE_READ;
|
||||
unsigned int DMA_MODE_WRITE;
|
||||
|
||||
EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
|
||||
EXPORT_SYMBOL(DMA_MODE_READ);
|
||||
EXPORT_SYMBOL(DMA_MODE_WRITE);
|
||||
|
||||
/*
|
||||
* These are used in binfmt_elf.c to put aux entries on the stack
|
||||
* for each elf executable being started.
|
||||
|
|
|
@ -595,6 +595,7 @@ void timer_interrupt(struct pt_regs * regs)
|
|||
irq_exit();
|
||||
set_irq_regs(old_regs);
|
||||
}
|
||||
EXPORT_SYMBOL(timer_interrupt);
|
||||
|
||||
/*
|
||||
* Hypervisor decrementer interrupts shouldn't occur but are sometimes
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
#include <asm/thread_info.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
||||
/* void do_load_up_transact_altivec(struct thread_struct *thread)
|
||||
|
@ -42,6 +43,7 @@ _GLOBAL(load_vr_state)
|
|||
mtvscr v0
|
||||
REST_32VRS(0,r4,r3)
|
||||
blr
|
||||
EXPORT_SYMBOL(load_vr_state)
|
||||
|
||||
/*
|
||||
* Store VMX state into memory, including VSCR.
|
||||
|
@ -53,6 +55,7 @@ _GLOBAL(store_vr_state)
|
|||
li r4, VRSTATE_VSCR
|
||||
stvx v0, r4, r3
|
||||
blr
|
||||
EXPORT_SYMBOL(store_vr_state)
|
||||
|
||||
/*
|
||||
* Disable VMX for the task which had it previously,
|
||||
|
|
|
@ -9,7 +9,7 @@ ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
|
|||
CFLAGS_REMOVE_code-patching.o = $(CC_FLAGS_FTRACE)
|
||||
CFLAGS_REMOVE_feature-fixups.o = $(CC_FLAGS_FTRACE)
|
||||
|
||||
obj-y += string.o alloc.o crtsavres.o ppc_ksyms.o code-patching.o \
|
||||
obj-y += string.o alloc.o crtsavres.o code-patching.o \
|
||||
feature-fixups.o
|
||||
|
||||
obj-$(CONFIG_PPC32) += div64.o copy_32.o
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
#include <asm/cache.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
.text
|
||||
|
||||
|
@ -68,6 +69,7 @@ _GLOBAL(__csum_partial)
|
|||
adde r5,r5,r0
|
||||
5: addze r3,r5 /* add in final carry */
|
||||
blr
|
||||
EXPORT_SYMBOL(__csum_partial)
|
||||
|
||||
/*
|
||||
* Computes the checksum of a memory block at src, length len,
|
||||
|
@ -295,3 +297,4 @@ dst_error:
|
|||
.long 41b,dst_error
|
||||
.long 50b,src_error
|
||||
.long 51b,dst_error
|
||||
EXPORT_SYMBOL(csum_partial_copy_generic)
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <asm/processor.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
/*
|
||||
* Computes the checksum of a memory block at buff, length len,
|
||||
|
@ -176,6 +177,7 @@ _GLOBAL(__csum_partial)
|
|||
add r3,r4,r0
|
||||
srdi r3,r3,32
|
||||
blr
|
||||
EXPORT_SYMBOL(__csum_partial)
|
||||
|
||||
|
||||
.macro srcnr
|
||||
|
@ -430,3 +432,4 @@ dstnr; stb r6,0(r4)
|
|||
li r6,-EFAULT
|
||||
stw r6,0(r8)
|
||||
blr
|
||||
EXPORT_SYMBOL(csum_partial_copy_generic)
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <asm/cache.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
#define COPY_16_BYTES \
|
||||
lwz r7,4(r4); \
|
||||
|
@ -92,6 +93,7 @@ _GLOBAL(memset)
|
|||
subf r6,r0,r6
|
||||
cmplwi 0,r4,0
|
||||
bne 2f /* Use normal procedure if r4 is not zero */
|
||||
EXPORT_SYMBOL(memset)
|
||||
_GLOBAL(memset_nocache_branch)
|
||||
b 2f /* Skip optimised bloc until cache is enabled */
|
||||
|
||||
|
@ -216,6 +218,8 @@ _GLOBAL(memcpy)
|
|||
stbu r0,1(r6)
|
||||
bdnz 40b
|
||||
65: blr
|
||||
EXPORT_SYMBOL(memcpy)
|
||||
EXPORT_SYMBOL(memmove)
|
||||
|
||||
generic_memcpy:
|
||||
srwi. r7,r5,3
|
||||
|
@ -507,3 +511,4 @@ _GLOBAL(__copy_tofrom_user)
|
|||
.long 112b,120b
|
||||
.long 114b,120b
|
||||
.text
|
||||
EXPORT_SYMBOL(__copy_tofrom_user)
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include <asm/processor.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
.section ".toc","aw"
|
||||
PPC64_CACHES:
|
||||
|
@ -110,3 +111,4 @@ END_FTR_SECTION_IFSET(CPU_FTR_CP_USE_DCBTZ)
|
|||
std r11,120(r3)
|
||||
std r12,128(r3)
|
||||
blr
|
||||
EXPORT_SYMBOL(copy_page)
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
*/
|
||||
#include <asm/processor.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
#ifdef __BIG_ENDIAN__
|
||||
#define sLd sld /* Shift towards low-numbered address. */
|
||||
|
@ -671,3 +672,4 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
|
|||
.llong 89b,100b
|
||||
.llong 90b,100b
|
||||
.llong 91b,100b
|
||||
EXPORT_SYMBOL(__copy_tofrom_user)
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
*/
|
||||
#include <asm/processor.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
/* Note: This code relies on -mminimal-toc */
|
||||
|
||||
|
@ -32,6 +33,7 @@ FTR_SECTION_ELSE
|
|||
clrldi r3,r3,64-8
|
||||
blr
|
||||
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
|
||||
EXPORT_SYMBOL(__arch_hweight8)
|
||||
|
||||
_GLOBAL(__arch_hweight16)
|
||||
BEGIN_FTR_SECTION
|
||||
|
@ -54,6 +56,7 @@ FTR_SECTION_ELSE
|
|||
blr
|
||||
ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 50)
|
||||
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
|
||||
EXPORT_SYMBOL(__arch_hweight16)
|
||||
|
||||
_GLOBAL(__arch_hweight32)
|
||||
BEGIN_FTR_SECTION
|
||||
|
@ -79,6 +82,7 @@ FTR_SECTION_ELSE
|
|||
blr
|
||||
ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 51)
|
||||
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
|
||||
EXPORT_SYMBOL(__arch_hweight32)
|
||||
|
||||
_GLOBAL(__arch_hweight64)
|
||||
BEGIN_FTR_SECTION
|
||||
|
@ -108,3 +112,4 @@ FTR_SECTION_ELSE
|
|||
blr
|
||||
ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 52)
|
||||
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
|
||||
EXPORT_SYMBOL(__arch_hweight64)
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
#include <asm/processor.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
_GLOBAL(memset)
|
||||
neg r0,r3
|
||||
|
@ -76,6 +77,7 @@ _GLOBAL(memset)
|
|||
10: bflr 31
|
||||
stb r4,0(r6)
|
||||
blr
|
||||
EXPORT_SYMBOL(memset)
|
||||
|
||||
_GLOBAL_TOC(memmove)
|
||||
cmplw 0,r3,r4
|
||||
|
@ -117,3 +119,4 @@ _GLOBAL(backwards_memcpy)
|
|||
beq 2b
|
||||
mtctr r7
|
||||
b 1b
|
||||
EXPORT_SYMBOL(memmove)
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
#define off8 r6
|
||||
#define off16 r7
|
||||
|
@ -231,3 +232,4 @@ _GLOBAL(memcmp)
|
|||
ld r28,-32(r1)
|
||||
ld r27,-40(r1)
|
||||
blr
|
||||
EXPORT_SYMBOL(memcmp)
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
*/
|
||||
#include <asm/processor.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
.align 7
|
||||
_GLOBAL_TOC(memcpy)
|
||||
|
@ -219,3 +220,4 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
|
|||
4: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
|
||||
blr
|
||||
#endif
|
||||
EXPORT_SYMBOL(memcpy)
|
||||
|
|
|
@ -1,29 +0,0 @@
|
|||
#include <linux/string.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <net/checksum.h>
|
||||
|
||||
EXPORT_SYMBOL(memcpy);
|
||||
EXPORT_SYMBOL(memset);
|
||||
EXPORT_SYMBOL(memmove);
|
||||
EXPORT_SYMBOL(memcmp);
|
||||
EXPORT_SYMBOL(memchr);
|
||||
|
||||
EXPORT_SYMBOL(strncpy);
|
||||
EXPORT_SYMBOL(strncmp);
|
||||
|
||||
#ifndef CONFIG_GENERIC_CSUM
|
||||
EXPORT_SYMBOL(__csum_partial);
|
||||
EXPORT_SYMBOL(csum_partial_copy_generic);
|
||||
#endif
|
||||
|
||||
EXPORT_SYMBOL(__copy_tofrom_user);
|
||||
EXPORT_SYMBOL(__clear_user);
|
||||
EXPORT_SYMBOL(copy_page);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
EXPORT_SYMBOL(__arch_hweight8);
|
||||
EXPORT_SYMBOL(__arch_hweight16);
|
||||
EXPORT_SYMBOL(__arch_hweight32);
|
||||
EXPORT_SYMBOL(__arch_hweight64);
|
||||
#endif
|
|
@ -11,6 +11,7 @@
|
|||
#include <asm/processor.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
.section __ex_table,"a"
|
||||
PPC_LONG_ALIGN
|
||||
|
@ -36,6 +37,7 @@ _GLOBAL(strncpy)
|
|||
2: stbu r0,1(r6) /* clear it out if so */
|
||||
bdnz 2b
|
||||
blr
|
||||
EXPORT_SYMBOL(strncpy)
|
||||
|
||||
_GLOBAL(strncmp)
|
||||
PPC_LCMPI 0,r5,0
|
||||
|
@ -53,6 +55,7 @@ _GLOBAL(strncmp)
|
|||
blr
|
||||
2: li r3,0
|
||||
blr
|
||||
EXPORT_SYMBOL(strncmp)
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
_GLOBAL(memcmp)
|
||||
|
@ -68,6 +71,7 @@ _GLOBAL(memcmp)
|
|||
blr
|
||||
2: li r3,0
|
||||
blr
|
||||
EXPORT_SYMBOL(memcmp)
|
||||
#endif
|
||||
|
||||
_GLOBAL(memchr)
|
||||
|
@ -82,6 +86,7 @@ _GLOBAL(memchr)
|
|||
beqlr
|
||||
2: li r3,0
|
||||
blr
|
||||
EXPORT_SYMBOL(memchr)
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
_GLOBAL(__clear_user)
|
||||
|
@ -125,4 +130,5 @@ _GLOBAL(__clear_user)
|
|||
PPC_LONG 1b,91b
|
||||
PPC_LONG 8b,92b
|
||||
.text
|
||||
EXPORT_SYMBOL(__clear_user)
|
||||
#endif
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
.section ".toc","aw"
|
||||
PPC64_CACHES:
|
||||
|
@ -200,3 +201,4 @@ err1; dcbz r0,r3
|
|||
cmpdi r4,32
|
||||
blt .Lshort_clear
|
||||
b .Lmedium_clear
|
||||
EXPORT_SYMBOL(__clear_user)
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <asm/ppc_asm.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
.section .bss
|
||||
|
@ -33,6 +34,7 @@
|
|||
.globl mmu_hash_lock
|
||||
mmu_hash_lock:
|
||||
.space 4
|
||||
EXPORT_SYMBOL(mmu_hash_lock)
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
/*
|
||||
|
@ -575,6 +577,7 @@ _GLOBAL(flush_hash_pages)
|
|||
rlwinm r8,r8,0,31,29 /* clear HASHPTE bit */
|
||||
stwcx. r8,0,r5 /* update the pte */
|
||||
bne- 33b
|
||||
EXPORT_SYMBOL(flush_hash_pages)
|
||||
|
||||
/* Get the address of the primary PTE group in the hash table (r3) */
|
||||
_GLOBAL(flush_hash_patch_A)
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <asm/ppc_asm.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/bug.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
#define DCR_ACCESS_PROLOG(table) \
|
||||
cmpli cr0,r3,1024; \
|
||||
|
@ -28,9 +29,11 @@
|
|||
|
||||
_GLOBAL(__mfdcr)
|
||||
DCR_ACCESS_PROLOG(__mfdcr_table)
|
||||
EXPORT_SYMBOL(__mfdcr)
|
||||
|
||||
_GLOBAL(__mtdcr)
|
||||
DCR_ACCESS_PROLOG(__mtdcr_table)
|
||||
EXPORT_SYMBOL(__mtdcr)
|
||||
|
||||
__mfdcr_table:
|
||||
mfdcr r3,0; blr
|
||||
|
|
Loading…
Reference in a new issue