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ARM: footbridge: use GENERIC_IRQ_MULTI_HANDLER
Footbridge still uses the classic IRQ entry path in assembler, but this is easily converted into an equivalent C version. In this case, the correlation between IRQ numbers and bits in the status register is non-obvious, and the priorities are handled by manually checking each bit in a static order, re-reading the status register after each handled event. I moved the code into the new file and edited the syntax without changing this sequence to keep the behavior as close as possible to what it traditionally did. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Arnd Bergmann
Ard Biesheuvel
parent
c1fe8d054c
commit
90890f17cc
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@ -362,6 +362,7 @@ config ARCH_FOOTBRIDGE
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select FOOTBRIDGE
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select NEED_MACH_IO_H if !MMU
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select NEED_MACH_MEMORY_H
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select GENERIC_IRQ_MULTI_HANDLER
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help
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Support for systems based on the DC21285 companion chip
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("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
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@ -27,6 +27,91 @@
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#include "common.h"
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <asm/hardware/dec21285.h>
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static int dc21285_get_irq(void)
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{
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void __iomem *irqstatus = (void __iomem *)CSR_IRQ_STATUS;
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u32 mask = readl(irqstatus);
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if (mask & IRQ_MASK_SDRAMPARITY)
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return IRQ_SDRAMPARITY;
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if (mask & IRQ_MASK_UART_RX)
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return IRQ_CONRX;
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if (mask & IRQ_MASK_DMA1)
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return IRQ_DMA1;
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if (mask & IRQ_MASK_DMA2)
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return IRQ_DMA2;
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if (mask & IRQ_MASK_IN0)
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return IRQ_IN0;
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if (mask & IRQ_MASK_IN1)
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return IRQ_IN1;
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if (mask & IRQ_MASK_IN2)
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return IRQ_IN2;
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if (mask & IRQ_MASK_IN3)
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return IRQ_IN3;
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if (mask & IRQ_MASK_PCI)
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return IRQ_PCI;
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if (mask & IRQ_MASK_DOORBELLHOST)
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return IRQ_DOORBELLHOST;
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if (mask & IRQ_MASK_I2OINPOST)
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return IRQ_I2OINPOST;
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if (mask & IRQ_MASK_TIMER1)
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return IRQ_TIMER1;
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if (mask & IRQ_MASK_TIMER2)
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return IRQ_TIMER2;
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if (mask & IRQ_MASK_TIMER3)
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return IRQ_TIMER3;
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if (mask & IRQ_MASK_UART_TX)
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return IRQ_CONTX;
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if (mask & IRQ_MASK_PCI_ABORT)
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return IRQ_PCI_ABORT;
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if (mask & IRQ_MASK_PCI_SERR)
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return IRQ_PCI_SERR;
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if (mask & IRQ_MASK_DISCARD_TIMER)
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return IRQ_DISCARD_TIMER;
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if (mask & IRQ_MASK_PCI_DPERR)
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return IRQ_PCI_DPERR;
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if (mask & IRQ_MASK_PCI_PERR)
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return IRQ_PCI_PERR;
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return 0;
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}
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static void dc21285_handle_irq(struct pt_regs *regs)
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{
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int irq;
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do {
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irq = dc21285_get_irq();
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if (!irq)
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break;
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generic_handle_irq(irq);
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} while (1);
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}
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unsigned int mem_fclk_21285 = 50000000;
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EXPORT_SYMBOL(mem_fclk_21285);
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@ -108,6 +193,8 @@ static void __init __fb_init_irq(void)
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void __init footbridge_init_irq(void)
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{
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set_handle_irq(dc21285_handle_irq);
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__fb_init_irq();
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if (!footbridge_cfn_mode())
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@ -1,107 +0,0 @@
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/*
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* arch/arm/mach-footbridge/include/mach/entry-macro.S
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*
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* Low-level IRQ helper macros for footbridge-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <asm/hardware/dec21285.h>
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.equ dc21285_high, ARMCSR_BASE & 0xff000000
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.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
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.macro get_irqnr_preamble, base, tmp
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mov \base, #dc21285_high
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.if dc21285_low
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orr \base, \base, #dc21285_low
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.endif
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, [\base, #0x180] @ get interrupts
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mov \irqnr, #IRQ_SDRAMPARITY
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tst \irqstat, #IRQ_MASK_SDRAMPARITY
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bne 1001f
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tst \irqstat, #IRQ_MASK_UART_RX
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movne \irqnr, #IRQ_CONRX
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bne 1001f
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tst \irqstat, #IRQ_MASK_DMA1
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movne \irqnr, #IRQ_DMA1
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bne 1001f
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tst \irqstat, #IRQ_MASK_DMA2
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movne \irqnr, #IRQ_DMA2
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bne 1001f
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tst \irqstat, #IRQ_MASK_IN0
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movne \irqnr, #IRQ_IN0
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bne 1001f
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tst \irqstat, #IRQ_MASK_IN1
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movne \irqnr, #IRQ_IN1
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bne 1001f
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tst \irqstat, #IRQ_MASK_IN2
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movne \irqnr, #IRQ_IN2
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bne 1001f
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tst \irqstat, #IRQ_MASK_IN3
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movne \irqnr, #IRQ_IN3
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bne 1001f
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tst \irqstat, #IRQ_MASK_PCI
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movne \irqnr, #IRQ_PCI
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bne 1001f
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tst \irqstat, #IRQ_MASK_DOORBELLHOST
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movne \irqnr, #IRQ_DOORBELLHOST
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bne 1001f
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tst \irqstat, #IRQ_MASK_I2OINPOST
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movne \irqnr, #IRQ_I2OINPOST
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bne 1001f
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tst \irqstat, #IRQ_MASK_TIMER1
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movne \irqnr, #IRQ_TIMER1
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bne 1001f
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tst \irqstat, #IRQ_MASK_TIMER2
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movne \irqnr, #IRQ_TIMER2
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bne 1001f
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tst \irqstat, #IRQ_MASK_TIMER3
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movne \irqnr, #IRQ_TIMER3
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bne 1001f
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tst \irqstat, #IRQ_MASK_UART_TX
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movne \irqnr, #IRQ_CONTX
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bne 1001f
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tst \irqstat, #IRQ_MASK_PCI_ABORT
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movne \irqnr, #IRQ_PCI_ABORT
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bne 1001f
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tst \irqstat, #IRQ_MASK_PCI_SERR
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movne \irqnr, #IRQ_PCI_SERR
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bne 1001f
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tst \irqstat, #IRQ_MASK_DISCARD_TIMER
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movne \irqnr, #IRQ_DISCARD_TIMER
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bne 1001f
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tst \irqstat, #IRQ_MASK_PCI_DPERR
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movne \irqnr, #IRQ_PCI_DPERR
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bne 1001f
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tst \irqstat, #IRQ_MASK_PCI_PERR
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movne \irqnr, #IRQ_PCI_PERR
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1001:
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.endm
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