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ASoC: Intel: Skylake: Update DMIC DAIs and capabilities

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On Skylake we can support upton 4DMICs on the PDM port, so update
the PCM capabilities accordingly

Also add a new DAI for DMIC pin which can be used for getting raw
DMIC data

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Dharageswari.R <dharageswari.r@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jeeja KP 2015-11-28 15:01:46 +05:30 committed by Mark Brown
parent 3c83ac2325
commit 8f35bf3f71
1 changed files with 18 additions and 5 deletions
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23
sound/soc/intel/skylake/skl-pcm.c
View file

@ -28,6 +28,7 @@
#define HDA_MONO 1 #define HDA_MONO 1
#define HDA_STEREO 2 #define HDA_STEREO 2
#define HDA_QUAD 4
static struct snd_pcm_hardware azx_pcm_hw = { static struct snd_pcm_hardware azx_pcm_hw = {
.info = (SNDRV_PCM_INFO_MMAP | .info = (SNDRV_PCM_INFO_MMAP |
@ -46,8 +47,8 @@ static struct snd_pcm_hardware azx_pcm_hw = {
SNDRV_PCM_RATE_8000, SNDRV_PCM_RATE_8000,
.rate_min = 8000, .rate_min = 8000,
.rate_max = 48000, .rate_max = 48000,
.channels_min = 2, .channels_min = 1,
.channels_max = 2, .channels_max = HDA_QUAD,
.buffer_bytes_max = AZX_MAX_BUF_SIZE, .buffer_bytes_max = AZX_MAX_BUF_SIZE,
.period_bytes_min = 128, .period_bytes_min = 128,
.period_bytes_max = AZX_MAX_BUF_SIZE / 2, .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
@ -560,7 +561,7 @@ static struct snd_soc_dai_driver skl_platform_dai[] = {
.capture = { .capture = {
.stream_name = "Reference Capture", .stream_name = "Reference Capture",
.channels_min = HDA_MONO, .channels_min = HDA_MONO,
.channels_max = HDA_STEREO, .channels_max = HDA_QUAD,
.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
}, },
@ -587,6 +588,18 @@ static struct snd_soc_dai_driver skl_platform_dai[] = {
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
}, },
}, },
{
.name = "DMIC Pin",
.ops = &skl_pcm_dai_ops,
.capture = {
.stream_name = "DMIC Capture",
.channels_min = HDA_MONO,
.channels_max = HDA_QUAD,
.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
},
},
/* BE CPU Dais */ /* BE CPU Dais */
{ {
.name = "SSP0 Pin", .name = "SSP0 Pin",
@ -640,8 +653,8 @@ static struct snd_soc_dai_driver skl_platform_dai[] = {
.ops = &skl_dmic_dai_ops, .ops = &skl_dmic_dai_ops,
.capture = { .capture = {
.stream_name = "DMIC01 Rx", .stream_name = "DMIC01 Rx",
.channels_min = HDA_STEREO, .channels_min = HDA_MONO,
.channels_max = HDA_STEREO, .channels_max = HDA_QUAD,
.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
}, },