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drm/i915: rip out superflous is_dp&is_cpu_edp tracking
The only exception left is is_cpu_edp in the haswell modeset code. We need that to assign the cpu transcoder, but we might want to move that eventually into the encoder, too. \o/-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4552,7 +4552,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
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intel_clock_t clock, reduced_clock;
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intel_clock_t clock, reduced_clock;
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u32 dspcntr, pipeconf;
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u32 dspcntr, pipeconf;
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bool ok, has_reduced_clock = false, is_sdvo = false;
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bool ok, has_reduced_clock = false, is_sdvo = false;
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bool is_lvds = false, is_tv = false, is_dp = false;
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bool is_lvds = false, is_tv = false;
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struct intel_encoder *encoder;
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struct intel_encoder *encoder;
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const intel_limit_t *limit;
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const intel_limit_t *limit;
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int ret;
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int ret;
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@ -4571,9 +4571,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
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case INTEL_OUTPUT_TVOUT:
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case INTEL_OUTPUT_TVOUT:
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is_tv = true;
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is_tv = true;
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break;
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break;
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case INTEL_OUTPUT_DISPLAYPORT:
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is_dp = true;
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break;
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}
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}
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num_connectors++;
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num_connectors++;
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@ -4656,7 +4653,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
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/* default to 8bpc */
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/* default to 8bpc */
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pipeconf &= ~(PIPECONF_BPC_MASK | PIPECONF_DITHER_EN);
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pipeconf &= ~(PIPECONF_BPC_MASK | PIPECONF_DITHER_EN);
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if (is_dp) {
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if (intel_crtc->config.has_dp_encoder) {
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if (intel_crtc->config.dither) {
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if (intel_crtc->config.dither) {
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pipeconf |= PIPECONF_6BPC |
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pipeconf |= PIPECONF_6BPC |
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PIPECONF_DITHER_EN |
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PIPECONF_DITHER_EN |
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@ -5456,7 +5453,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
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uint32_t dpll;
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uint32_t dpll;
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int factor, num_connectors = 0;
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int factor, num_connectors = 0;
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bool is_lvds = false, is_sdvo = false, is_tv = false;
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bool is_lvds = false, is_sdvo = false, is_tv = false;
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bool is_dp = false, is_cpu_edp = false;
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for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
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for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
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switch (intel_encoder->type) {
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switch (intel_encoder->type) {
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@ -5472,14 +5468,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
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case INTEL_OUTPUT_TVOUT:
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case INTEL_OUTPUT_TVOUT:
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is_tv = true;
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is_tv = true;
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break;
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break;
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case INTEL_OUTPUT_DISPLAYPORT:
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is_dp = true;
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break;
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case INTEL_OUTPUT_EDP:
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is_dp = true;
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if (!intel_encoder_is_pch_edp(&intel_encoder->base))
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is_cpu_edp = true;
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break;
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}
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}
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num_connectors++;
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num_connectors++;
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@ -5511,7 +5499,8 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
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}
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}
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dpll |= DPLL_DVO_HIGH_SPEED;
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dpll |= DPLL_DVO_HIGH_SPEED;
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}
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}
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if (is_dp && !is_cpu_edp)
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if (intel_crtc->config.has_dp_encoder &&
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intel_crtc->config.has_pch_encoder)
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dpll |= DPLL_DVO_HIGH_SPEED;
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dpll |= DPLL_DVO_HIGH_SPEED;
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/* compute bitmask from p1 value */
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/* compute bitmask from p1 value */
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@ -5564,7 +5553,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
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intel_clock_t clock, reduced_clock;
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intel_clock_t clock, reduced_clock;
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u32 dpll, fp = 0, fp2 = 0;
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u32 dpll, fp = 0, fp2 = 0;
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bool ok, has_reduced_clock = false;
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bool ok, has_reduced_clock = false;
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bool is_lvds = false, is_dp = false, is_cpu_edp = false;
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bool is_lvds = false;
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struct intel_encoder *encoder;
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struct intel_encoder *encoder;
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int ret;
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int ret;
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bool dither, fdi_config_ok;
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bool dither, fdi_config_ok;
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@ -5574,14 +5563,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
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case INTEL_OUTPUT_LVDS:
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case INTEL_OUTPUT_LVDS:
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is_lvds = true;
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is_lvds = true;
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break;
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break;
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case INTEL_OUTPUT_DISPLAYPORT:
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is_dp = true;
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break;
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case INTEL_OUTPUT_EDP:
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is_dp = true;
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if (!intel_encoder_is_pch_edp(&encoder->base))
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is_cpu_edp = true;
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break;
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}
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}
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num_connectors++;
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num_connectors++;
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@ -5618,7 +5599,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
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drm_mode_debug_printmodeline(mode);
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drm_mode_debug_printmodeline(mode);
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/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
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/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
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if (!is_cpu_edp) {
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if (intel_crtc->config.has_pch_encoder) {
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struct intel_pch_pll *pll;
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struct intel_pch_pll *pll;
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pll = intel_get_pch_pll(intel_crtc, dpll, fp);
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pll = intel_get_pch_pll(intel_crtc, dpll, fp);
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@ -5731,18 +5712,14 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
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int pipe = intel_crtc->pipe;
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int pipe = intel_crtc->pipe;
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int plane = intel_crtc->plane;
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int plane = intel_crtc->plane;
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int num_connectors = 0;
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int num_connectors = 0;
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bool is_dp = false, is_cpu_edp = false;
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bool is_cpu_edp = false;
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struct intel_encoder *encoder;
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struct intel_encoder *encoder;
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int ret;
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int ret;
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bool dither;
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bool dither;
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for_each_encoder_on_crtc(dev, crtc, encoder) {
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for_each_encoder_on_crtc(dev, crtc, encoder) {
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switch (encoder->type) {
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switch (encoder->type) {
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case INTEL_OUTPUT_DISPLAYPORT:
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is_dp = true;
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break;
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case INTEL_OUTPUT_EDP:
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case INTEL_OUTPUT_EDP:
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is_dp = true;
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if (!intel_encoder_is_pch_edp(&encoder->base))
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if (!intel_encoder_is_pch_edp(&encoder->base))
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is_cpu_edp = true;
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is_cpu_edp = true;
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break;
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break;
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