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ASoC: cs35l41: Create shared function for errata patches
ASoC and HDA systems require the same errata patches, so move it to the shared code using a function the correctly applies the patches by revision Also, move CS35L41_DSP1_CCM_CORE_CTRL write to errata patch function as is required to be written at boot, but not in regmap_register_patch sequence as will affect waking up from hibernation Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com> Link: https://lore.kernel.org/r/20211217115708.882525-5-tanureal@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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062ce05933
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@ -763,5 +763,6 @@ extern struct regmap_config cs35l41_regmap_i2c;
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extern struct regmap_config cs35l41_regmap_spi;
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int cs35l41_otp_unpack(struct device *dev, struct regmap *regmap);
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int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsigned int reg_revid);
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#endif /* __CS35L41_H */
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@ -659,6 +659,57 @@ static const struct cs35l41_otp_packed_element_t otp_map_2[CS35L41_NUM_OTP_ELEM]
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{ 0x00017044, 0, 24 }, /*LOT_NUMBER*/
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};
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static const struct reg_sequence cs35l41_reva0_errata_patch[] = {
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{ 0x00000040, 0x00005555 },
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{ 0x00000040, 0x0000AAAA },
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{ 0x00003854, 0x05180240 },
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{ CS35L41_VIMON_SPKMON_RESYNC, 0x00000000 },
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{ 0x00004310, 0x00000000 },
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{ CS35L41_VPVBST_FS_SEL, 0x00000000 },
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{ CS35L41_OTP_TRIM_30, 0x9091A1C8 },
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{ 0x00003014, 0x0200EE0E },
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{ CS35L41_BSTCVRT_DCM_CTRL, 0x00000051 },
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{ 0x00000054, 0x00000004 },
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{ CS35L41_IRQ1_DB3, 0x00000000 },
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{ CS35L41_IRQ2_DB3, 0x00000000 },
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{ CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000 },
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{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },
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{ 0x00000040, 0x0000CCCC },
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{ 0x00000040, 0x00003333 },
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{ CS35L41_PWR_CTRL2, 0x00000000 },
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{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
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};
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static const struct reg_sequence cs35l41_revb0_errata_patch[] = {
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{ 0x00000040, 0x00005555 },
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{ 0x00000040, 0x0000AAAA },
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{ CS35L41_VIMON_SPKMON_RESYNC, 0x00000000 },
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{ 0x00004310, 0x00000000 },
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{ CS35L41_VPVBST_FS_SEL, 0x00000000 },
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{ CS35L41_BSTCVRT_DCM_CTRL, 0x00000051 },
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{ CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000 },
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{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },
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{ 0x00000040, 0x0000CCCC },
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{ 0x00000040, 0x00003333 },
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{ CS35L41_PWR_CTRL2, 0x00000000 },
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{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
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};
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static const struct reg_sequence cs35l41_revb2_errata_patch[] = {
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{ 0x00000040, 0x00005555 },
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{ 0x00000040, 0x0000AAAA },
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{ CS35L41_VIMON_SPKMON_RESYNC, 0x00000000 },
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{ 0x00004310, 0x00000000 },
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{ CS35L41_VPVBST_FS_SEL, 0x00000000 },
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{ CS35L41_BSTCVRT_DCM_CTRL, 0x00000051 },
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{ CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000 },
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{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },
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{ 0x00000040, 0x0000CCCC },
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{ 0x00000040, 0x00003333 },
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{ CS35L41_PWR_CTRL2, 0x00000000 },
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{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
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};
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static const struct cs35l41_otp_map_element_t cs35l41_otp_map_map[] = {
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{
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.id = 0x01,
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@ -845,6 +896,44 @@ int cs35l41_otp_unpack(struct device *dev, struct regmap *regmap)
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}
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EXPORT_SYMBOL_GPL(cs35l41_otp_unpack);
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int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsigned int reg_revid)
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{
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char *rev;
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int ret;
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switch (reg_revid) {
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case CS35L41_REVID_A0:
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ret = regmap_register_patch(reg, cs35l41_reva0_errata_patch,
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ARRAY_SIZE(cs35l41_reva0_errata_patch));
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rev = "A0";
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break;
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case CS35L41_REVID_B0:
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ret = regmap_register_patch(reg, cs35l41_revb0_errata_patch,
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ARRAY_SIZE(cs35l41_revb0_errata_patch));
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rev = "B0";
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break;
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case CS35L41_REVID_B2:
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ret = regmap_register_patch(reg, cs35l41_revb2_errata_patch,
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ARRAY_SIZE(cs35l41_revb2_errata_patch));
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rev = "B2";
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break;
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default:
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ret = -EINVAL;
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rev = "XX";
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break;
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}
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if (ret)
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dev_err(dev, "Failed to apply %s errata patch: %d\n", rev, ret);
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ret = regmap_write(reg, CS35L41_DSP1_CCM_CORE_CTRL, 0);
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if (ret < 0)
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dev_err(dev, "Write CCM_CORE_CTRL failed: %d\n", ret);
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return ret;
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}
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EXPORT_SYMBOL_GPL(cs35l41_register_errata_patch);
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MODULE_DESCRIPTION("CS35L41 library");
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MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>");
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MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
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@ -1271,57 +1271,6 @@ static int cs35l41_handle_pdata(struct device *dev,
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return 0;
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}
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static const struct reg_sequence cs35l41_reva0_errata_patch[] = {
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{ 0x00000040, 0x00005555 },
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{ 0x00000040, 0x0000AAAA },
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{ 0x00003854, 0x05180240 },
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{ CS35L41_VIMON_SPKMON_RESYNC, 0x00000000 },
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{ 0x00004310, 0x00000000 },
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{ CS35L41_VPVBST_FS_SEL, 0x00000000 },
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{ CS35L41_OTP_TRIM_30, 0x9091A1C8 },
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{ 0x00003014, 0x0200EE0E },
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{ CS35L41_BSTCVRT_DCM_CTRL, 0x00000051 },
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{ 0x00000054, 0x00000004 },
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{ CS35L41_IRQ1_DB3, 0x00000000 },
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{ CS35L41_IRQ2_DB3, 0x00000000 },
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{ CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000 },
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{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },
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{ 0x00000040, 0x0000CCCC },
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{ 0x00000040, 0x00003333 },
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{ CS35L41_PWR_CTRL2, 0x00000000 },
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{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
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};
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static const struct reg_sequence cs35l41_revb0_errata_patch[] = {
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{ 0x00000040, 0x00005555 },
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{ 0x00000040, 0x0000AAAA },
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{ CS35L41_VIMON_SPKMON_RESYNC, 0x00000000 },
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{ 0x00004310, 0x00000000 },
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{ CS35L41_VPVBST_FS_SEL, 0x00000000 },
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{ CS35L41_BSTCVRT_DCM_CTRL, 0x00000051 },
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{ CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000 },
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{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },
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{ 0x00000040, 0x0000CCCC },
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{ 0x00000040, 0x00003333 },
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{ CS35L41_PWR_CTRL2, 0x00000000 },
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{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
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};
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static const struct reg_sequence cs35l41_revb2_errata_patch[] = {
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{ 0x00000040, 0x00005555 },
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{ 0x00000040, 0x0000AAAA },
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{ CS35L41_VIMON_SPKMON_RESYNC, 0x00000000 },
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{ 0x00004310, 0x00000000 },
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{ CS35L41_VPVBST_FS_SEL, 0x00000000 },
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{ CS35L41_BSTCVRT_DCM_CTRL, 0x00000051 },
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{ CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000 },
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{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },
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{ 0x00000040, 0x0000CCCC },
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{ 0x00000040, 0x00003333 },
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{ CS35L41_PWR_CTRL2, 0x00000000 },
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{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
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};
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static const struct reg_sequence cs35l41_fs_errata_patch[] = {
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{ CS35L41_DSP1_RX1_RATE, 0x00000001 },
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{ CS35L41_DSP1_RX2_RATE, 0x00000001 },
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@ -1501,38 +1450,9 @@ int cs35l41_probe(struct cs35l41_private *cs35l41,
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goto err;
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}
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switch (reg_revid) {
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case CS35L41_REVID_A0:
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ret = regmap_register_patch(cs35l41->regmap,
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cs35l41_reva0_errata_patch,
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ARRAY_SIZE(cs35l41_reva0_errata_patch));
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if (ret < 0) {
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dev_err(cs35l41->dev,
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"Failed to apply A0 errata patch: %d\n", ret);
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goto err;
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}
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break;
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case CS35L41_REVID_B0:
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ret = regmap_register_patch(cs35l41->regmap,
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cs35l41_revb0_errata_patch,
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ARRAY_SIZE(cs35l41_revb0_errata_patch));
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if (ret < 0) {
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dev_err(cs35l41->dev,
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"Failed to apply B0 errata patch: %d\n", ret);
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goto err;
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}
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break;
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case CS35L41_REVID_B2:
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ret = regmap_register_patch(cs35l41->regmap,
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cs35l41_revb2_errata_patch,
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ARRAY_SIZE(cs35l41_revb2_errata_patch));
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if (ret < 0) {
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dev_err(cs35l41->dev,
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"Failed to apply B2 errata patch: %d\n", ret);
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goto err;
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}
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break;
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}
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ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid);
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if (ret)
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goto err;
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irq_pol = cs35l41_irq_gpio_config(cs35l41);
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goto err;
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}
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ret = regmap_write(cs35l41->regmap, CS35L41_DSP1_CCM_CORE_CTRL, 0);
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if (ret < 0) {
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dev_err(cs35l41->dev, "Write CCM_CORE_CTRL failed: %d\n", ret);
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goto err;
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}
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ret = cs35l41_set_pdata(cs35l41);
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if (ret < 0) {
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dev_err(cs35l41->dev, "Set pdata failed: %d\n", ret);
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