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dt-bindings: ata: ahci-platform: Convert DT bindings to yaml
Create a yaml file for dtbs_check from the old txt binding. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220311210357.222830-2-linux@fw-web.de
This commit is contained in:
Frank Wunderlich
Rob Herring
parent
ef8795f3f1
commit
7f4f25a688
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* AHCI SATA Controller
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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It is possible, but not required, to represent each port as a sub-node.
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It allows to enable each port independently when dealing with multiple
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PHYs.
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Required properties:
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- compatible : compatible string, one of:
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- "brcm,iproc-ahci"
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- "hisilicon,hisi-ahci"
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- "cavium,octeon-7130-ahci"
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- "ibm,476gtr-ahci"
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- "marvell,armada-380-ahci"
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- "marvell,armada-3700-ahci"
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- "snps,dwc-ahci"
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- "snps,spear-ahci"
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- "generic-ahci"
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- interrupts : <interrupt mapping for SATA IRQ>
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- reg : <registers mapping>
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Please note that when using "generic-ahci" you must also specify a SoC specific
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compatible:
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compatible = "manufacturer,soc-model-ahci", "generic-ahci";
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Optional properties:
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- dma-coherent : Present if dma operations are coherent
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- clocks : a list of phandle + clock specifier pairs
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- resets : a list of phandle + reset specifier pairs
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- target-supply : regulator for SATA target power
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- phy-supply : regulator for PHY power
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- phys : reference to the SATA PHY node
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- phy-names : must be "sata-phy"
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- ahci-supply : regulator for AHCI controller
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- ports-implemented : Mask that indicates which ports that the HBA supports
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are available for software to use. Useful if PORTS_IMPL
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is not programmed by the BIOS, which is true with
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some embedded SOC's.
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Required properties when using sub-nodes:
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- #address-cells : number of cells to encode an address
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- #size-cells : number of cells representing the size of an address
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Sub-nodes required properties:
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- reg : the port number
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And at least one of the following properties:
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- phys : reference to the SATA PHY node
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- target-supply : regulator for SATA target power
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Examples:
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sata@ffe08000 {
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compatible = "snps,spear-ahci";
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reg = <0xffe08000 0x1000>;
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interrupts = <115>;
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};
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With sub-nodes:
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sata@f7e90000 {
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compatible = "marvell,berlin2q-achi", "generic-ahci";
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reg = <0xe90000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&chip CLKID_SATA>;
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#address-cells = <1>;
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#size-cells = <0>;
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sata0: sata-port@0 {
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reg = <0>;
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phys = <&sata_phy 0>;
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target-supply = <®_sata0>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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phys = <&sata_phy 1>;
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target-supply = <®_sata1>;;
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};
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};
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182
Documentation/devicetree/bindings/ata/ahci-platform.yaml
Normal file
182
Documentation/devicetree/bindings/ata/ahci-platform.yaml
Normal file
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@ -0,0 +1,182 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: AHCI SATA Controller
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description: |
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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It is possible, but not required, to represent each port as a sub-node.
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It allows to enable each port independently when dealing with multiple
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PHYs.
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maintainers:
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- Hans de Goede <hdegoede@redhat.com>
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- Jens Axboe <axboe@kernel.dk>
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select:
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properties:
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compatible:
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contains:
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enum:
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- brcm,iproc-ahci
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- cavium,octeon-7130-ahci
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- hisilicon,hisi-ahci
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- ibm,476gtr-ahci
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- marvell,armada-3700-ahci
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- marvell,armada-8k-ahci
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- marvell,berlin2q-ahci
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- snps,dwc-ahci
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- snps,spear-ahci
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required:
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- compatible
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allOf:
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- $ref: "sata-common.yaml#"
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- brcm,iproc-ahci
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- marvell,armada-8k-ahci
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- marvell,berlin2-ahci
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- marvell,berlin2q-ahci
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- const: generic-ahci
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- enum:
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- cavium,octeon-7130-ahci
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- hisilicon,hisi-ahci
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- ibm,476gtr-ahci
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- marvell,armada-3700-ahci
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- snps,dwc-ahci
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- snps,spear-ahci
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reg:
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minItems: 1
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maxItems: 2
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reg-names:
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maxItems: 1
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clocks:
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description:
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Clock IDs array as required by the controller.
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minItems: 1
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maxItems: 3
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clock-names:
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description:
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Names of clocks corresponding to IDs in the clock property.
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minItems: 1
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maxItems: 3
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interrupts:
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maxItems: 1
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ahci-supply:
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description:
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regulator for AHCI controller
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dma-coherent: true
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phy-supply:
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description:
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regulator for PHY power
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phys:
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description:
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List of all PHYs on this controller
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maxItems: 1
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phy-names:
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description:
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Name specifier for the PHYs
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maxItems: 1
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ports-implemented:
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$ref: '/schemas/types.yaml#/definitions/uint32'
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description: |
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Mask that indicates which ports that the HBA supports
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are available for software to use. Useful if PORTS_IMPL
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is not programmed by the BIOS, which is true with
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some embedded SoCs.
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maximum: 0x1f
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resets:
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maxItems: 1
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target-supply:
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description:
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regulator for SATA target power
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required:
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- compatible
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- reg
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- interrupts
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patternProperties:
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"^sata-port@[0-9a-f]+$":
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type: object
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additionalProperties: false
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description:
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Subnode with configuration of the Ports.
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properties:
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reg:
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maxItems: 1
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phys:
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maxItems: 1
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phy-names:
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maxItems: 1
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target-supply:
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description:
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regulator for SATA target power
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required:
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- reg
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anyOf:
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- required: [ phys ]
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- required: [ target-supply ]
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unevaluatedProperties: false
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examples:
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- |
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sata@ffe08000 {
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compatible = "snps,spear-ahci";
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reg = <0xffe08000 0x1000>;
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interrupts = <115>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/berlin2q.h>
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sata@f7e90000 {
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compatible = "marvell,berlin2q-ahci", "generic-ahci";
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reg = <0xf7e90000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&chip CLKID_SATA>;
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#address-cells = <1>;
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#size-cells = <0>;
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sata0: sata-port@0 {
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reg = <0>;
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phys = <&sata_phy 0>;
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target-supply = <®_sata0>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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phys = <&sata_phy 1>;
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target-supply = <®_sata1>;
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};
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};
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