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pmem: kill wmb_pmem()
All users have been replaced with flushing in the pmem driver. Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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7c8a6a7190
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@ -26,8 +26,7 @@
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* @n: length of the copy in bytes
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*
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* Copy data to persistent memory media via non-temporal stores so that
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* a subsequent arch_wmb_pmem() can flush cpu and memory controller
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* write buffers to guarantee durability.
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* a subsequent pmem driver flush operation will drain posted write queues.
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*/
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static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,
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size_t n)
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@ -56,33 +55,13 @@ static inline int arch_memcpy_from_pmem(void *dst, const void __pmem *src,
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return 0;
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}
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/**
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* arch_wmb_pmem - synchronize writes to persistent memory
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*
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* After a series of arch_memcpy_to_pmem() operations this drains data
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* from cpu write buffers and any platform (memory controller) buffers
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* to ensure that written data is durable on persistent memory media.
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*/
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static inline void arch_wmb_pmem(void)
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{
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/*
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* wmb() to 'sfence' all previous writes such that they are
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* architecturally visible to 'pcommit'. Note, that we've
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* already arranged for pmem writes to avoid the cache via
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* arch_memcpy_to_pmem().
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*/
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wmb();
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pcommit_sfence();
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}
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/**
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* arch_wb_cache_pmem - write back a cache range with CLWB
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* @vaddr: virtual start address
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* @size: number of bytes to write back
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*
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* Write back a cache range using the CLWB (cache line write back)
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* instruction. This function requires explicit ordering with an
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* arch_wmb_pmem() call.
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* instruction.
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*/
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static inline void arch_wb_cache_pmem(void __pmem *addr, size_t size)
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{
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@ -113,7 +92,6 @@ static inline bool __iter_needs_pmem_wb(struct iov_iter *i)
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* @i: iterator with source data
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*
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* Copy data from the iterator 'i' to the PMEM buffer starting at 'addr'.
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* This function requires explicit ordering with an arch_wmb_pmem() call.
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*/
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static inline size_t arch_copy_from_iter_pmem(void __pmem *addr, size_t bytes,
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struct iov_iter *i)
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@ -136,7 +114,6 @@ static inline size_t arch_copy_from_iter_pmem(void __pmem *addr, size_t bytes,
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* @size: number of bytes to zero
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*
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* Write zeros into the memory range starting at 'addr' for 'size' bytes.
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* This function requires explicit ordering with an arch_wmb_pmem() call.
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*/
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static inline void arch_clear_pmem(void __pmem *addr, size_t size)
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{
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@ -150,14 +127,5 @@ static inline void arch_invalidate_pmem(void __pmem *addr, size_t size)
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{
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clflush_cache_range((void __force *) addr, size);
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}
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static inline bool __arch_has_wmb_pmem(void)
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{
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/*
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* We require that wmb() be an 'sfence', that is only guaranteed on
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* 64-bit builds
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*/
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return static_cpu_has(X86_FEATURE_PCOMMIT);
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}
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#endif /* CONFIG_ARCH_HAS_PMEM_API */
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#endif /* __ASM_X86_PMEM_H__ */
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@ -26,16 +26,6 @@
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* calling these symbols with arch_has_pmem_api() and redirect to the
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* implementation in asm/pmem.h.
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*/
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static inline bool __arch_has_wmb_pmem(void)
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{
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return false;
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}
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static inline void arch_wmb_pmem(void)
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{
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BUG();
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}
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static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,
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size_t n)
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{
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@ -101,20 +91,6 @@ static inline int memcpy_from_pmem(void *dst, void __pmem const *src,
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return default_memcpy_from_pmem(dst, src, size);
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}
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/**
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* arch_has_wmb_pmem - true if wmb_pmem() ensures durability
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*
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* For a given cpu implementation within an architecture it is possible
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* that wmb_pmem() resolves to a nop. In the case this returns
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* false, pmem api users are unable to ensure durability and may want to
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* fall back to a different data consistency model, or otherwise notify
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* the user.
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*/
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static inline bool arch_has_wmb_pmem(void)
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{
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return arch_has_pmem_api() && __arch_has_wmb_pmem();
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}
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/*
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* These defaults seek to offer decent performance and minimize the
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* window between i/o completion and writes being durable on media.
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@ -152,7 +128,7 @@ static inline void default_clear_pmem(void __pmem *addr, size_t size)
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* being effectively evicted from, or never written to, the processor
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* cache hierarchy after the copy completes. After memcpy_to_pmem()
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* data may still reside in cpu or platform buffers, so this operation
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* must be followed by a wmb_pmem().
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* must be followed by a blkdev_issue_flush() on the pmem block device.
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*/
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static inline void memcpy_to_pmem(void __pmem *dst, const void *src, size_t n)
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{
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@ -162,21 +138,6 @@ static inline void memcpy_to_pmem(void __pmem *dst, const void *src, size_t n)
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default_memcpy_to_pmem(dst, src, n);
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}
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/**
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* wmb_pmem - synchronize writes to persistent memory
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*
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* After a series of memcpy_to_pmem() operations this drains data from
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* cpu write buffers and any platform (memory controller) buffers to
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* ensure that written data is durable on persistent memory media.
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*/
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static inline void wmb_pmem(void)
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{
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if (arch_has_wmb_pmem())
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arch_wmb_pmem();
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else
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wmb();
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}
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/**
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* copy_from_iter_pmem - copy data from an iterator to PMEM
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* @addr: PMEM destination address
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@ -184,7 +145,7 @@ static inline void wmb_pmem(void)
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* @i: iterator with source data
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*
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* Copy data from the iterator 'i' to the PMEM buffer starting at 'addr'.
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* This function requires explicit ordering with a wmb_pmem() call.
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* See blkdev_issue_flush() note for memcpy_to_pmem().
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*/
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static inline size_t copy_from_iter_pmem(void __pmem *addr, size_t bytes,
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struct iov_iter *i)
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@ -200,7 +161,7 @@ static inline size_t copy_from_iter_pmem(void __pmem *addr, size_t bytes,
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* @size: number of bytes to zero
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*
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* Write zeros into the memory range starting at 'addr' for 'size' bytes.
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* This function requires explicit ordering with a wmb_pmem() call.
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* See blkdev_issue_flush() note for memcpy_to_pmem().
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*/
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static inline void clear_pmem(void __pmem *addr, size_t size)
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{
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@ -230,7 +191,7 @@ static inline void invalidate_pmem(void __pmem *addr, size_t size)
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* @size: number of bytes to write back
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*
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* Write back the processor cache range starting at 'addr' for 'size' bytes.
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* This function requires explicit ordering with a wmb_pmem() call.
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* See blkdev_issue_flush() note for memcpy_to_pmem().
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*/
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static inline void wb_cache_pmem(void __pmem *addr, size_t size)
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{
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