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Staging: sxg: Add Jumbo frames support to Sahara SXG Driver
This patch adds Jumbo frame support to Sahara's SXG Driver. Signed-off-by: LinSysSoft Sahara Team <saharaproj@linsyssoft.com> Signed-off-by: Mithlesh Thukral <mithlesh@linsyssoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Mithlesh Thukral
Greg Kroah-Hartman
parent
559990c688
commit
7c66b14b6b
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@ -146,6 +146,7 @@ static int sxg_initialize_adapter(struct adapter_t *adapter);
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static void sxg_stock_rcv_buffers(struct adapter_t *adapter);
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static void sxg_complete_descriptor_blocks(struct adapter_t *adapter,
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unsigned char Index);
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int sxg_change_mtu (struct net_device *netdev, int new_mtu);
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static int sxg_initialize_link(struct adapter_t *adapter);
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static int sxg_phy_init(struct adapter_t *adapter);
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static void sxg_link_event(struct adapter_t *adapter);
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@ -942,6 +943,7 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
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netdev->stop = sxg_entry_halt;
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netdev->hard_start_xmit = sxg_send_packets;
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netdev->do_ioctl = sxg_ioctl;
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netdev->change_mtu = sxg_change_mtu;
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#if XXXTODO
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netdev->set_mac_address = sxg_mac_set_address;
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#endif
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@ -1327,6 +1329,7 @@ static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId,
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struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr;
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#endif
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u32 ReturnStatus = 0;
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int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS;
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ASSERT((adapter->State == SXG_STATE_RUNNING) ||
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(adapter->State == SXG_STATE_PAUSING) ||
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@ -1410,7 +1413,10 @@ static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId,
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* sxg_complete_descriptor_blocks failed to allocate
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* receive buffers.
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*/
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if (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) {
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if (adapter->JumboEnabled)
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sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS;
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if (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) {
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sxg_stock_rcv_buffers(adapter);
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}
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/*
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@ -1967,6 +1973,57 @@ static int sxg_entry_open(struct net_device *dev)
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struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev);
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int status;
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static int turn;
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int sxg_initial_rcv_data_buffers = SXG_INITIAL_RCV_DATA_BUFFERS;
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int i;
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if (adapter->JumboEnabled == TRUE) {
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sxg_initial_rcv_data_buffers =
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SXG_INITIAL_JUMBO_RCV_DATA_BUFFERS;
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SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo,
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SXG_JUMBO_RCV_RING_SIZE);
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}
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/*
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* Allocate receive data buffers. We allocate a block of buffers and
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* a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK
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*/
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for (i = 0; i < sxg_initial_rcv_data_buffers;
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i += SXG_RCV_DESCRIPTORS_PER_BLOCK)
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{
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status = sxg_allocate_buffer_memory(adapter,
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SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE),
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SXG_BUFFER_TYPE_RCV);
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if (status != STATUS_SUCCESS)
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return status;
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}
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/*
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* NBL resource allocation can fail in the 'AllocateComplete' routine,
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* which doesn't return status. Make sure we got the number of buffers
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* we requested
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*/
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if (adapter->FreeRcvBufferCount < sxg_initial_rcv_data_buffers) {
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6",
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adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES,
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0);
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return (STATUS_RESOURCES);
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}
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/*
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* The microcode expects it to be downloaded on every open.
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*/
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DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __FUNCTION__);
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if (sxg_download_microcode(adapter, SXG_UCODE_SAHARA)) {
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DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n",
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__FUNCTION__);
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sxg_read_config(adapter);
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} else {
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adapter->state = ADAPT_FAIL;
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adapter->linkstate = LINK_DOWN;
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DBG_ERROR("sxg_download_microcode FAILED status[%x]\n",
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status);
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}
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msleep(5);
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if (turn) {
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sxg_second_open(adapter->netdev);
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@ -2089,11 +2146,19 @@ static void __devexit sxg_entry_remove(struct pci_dev *pcidev)
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static int sxg_entry_halt(struct net_device *dev)
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{
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struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev);
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struct sxg_hw_regs *HwRegs = adapter->HwRegs;
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int i;
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u32 RssIds, IsrCount;
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unsigned long flags;
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RssIds = SXG_RSS_CPU_COUNT(adapter);
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IsrCount = adapter->MsiEnabled ? RssIds : 1;
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napi_disable(&adapter->napi);
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spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags);
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DBG_ERROR("sxg: %s (%s) ENTER\n", __func__, dev->name);
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WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 0, true);
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netif_stop_queue(adapter->netdev);
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adapter->state = ADAPT_DOWN;
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adapter->linkstate = LINK_DOWN;
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@ -2111,6 +2176,50 @@ static int sxg_entry_halt(struct net_device *dev)
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spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags);
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sxg_deregister_interrupt(adapter);
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WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH);
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mdelay(5000);
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spin_lock(&adapter->RcvQLock);
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/* Free all the blocks and the buffers, moved from remove() routine */
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if (!(IsListEmpty(&adapter->AllRcvBlocks))) {
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sxg_free_rcvblocks(adapter);
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}
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InitializeListHead(&adapter->FreeRcvBuffers);
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InitializeListHead(&adapter->FreeRcvBlocks);
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InitializeListHead(&adapter->AllRcvBlocks);
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InitializeListHead(&adapter->FreeSglBuffers);
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InitializeListHead(&adapter->AllSglBuffers);
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adapter->FreeRcvBufferCount = 0;
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adapter->FreeRcvBlockCount = 0;
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adapter->AllRcvBlockCount = 0;
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adapter->RcvBuffersOnCard = 0;
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adapter->PendingRcvCount = 0;
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memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1);
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memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds);
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memset(adapter->Isr, 0, sizeof(u32) * IsrCount);
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for (i = 0; i < SXG_MAX_RING_SIZE; i++)
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adapter->RcvRingZeroInfo.Context[i] = NULL;
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SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE);
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SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE);
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spin_unlock(&adapter->RcvQLock);
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spin_lock_irqsave(&adapter->XmtZeroLock, flags);
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adapter->AllSglBufferCount = 0;
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adapter->FreeSglBufferCount = 0;
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adapter->PendingXmtCount = 0;
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memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1);
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memset(adapter->XmtRingZeroIndex, 0, sizeof(u32));
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spin_unlock_irqrestore(&adapter->XmtZeroLock, flags);
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for (i = 0; i < SXG_MAX_RSS; i++) {
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adapter->NextEvent[i] = 0;
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}
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atomic_set(&adapter->pending_allocations, 0);
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return (STATUS_SUCCESS);
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}
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@ -2392,6 +2501,20 @@ static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl,
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*/
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phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
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PCI_DMA_TODEVICE);
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/*
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* SAHARA SGL WORKAROUND
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* See if the SGL straddles a 64k boundary. If so, skip to
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* the start of the next 64k boundary and continue
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*/
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if (SXG_INVALID_SGL(phys_addr,skb->data_len))
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{
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spin_unlock_irqrestore(&adapter->XmtZeroLock, flags);
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/* Silently drop this packet */
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printk(KERN_EMERG"Dropped a packet for 64k boundary problem\n");
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return STATUS_SUCCESS;
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}
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memset(XmtCmd, '\0', sizeof(*XmtCmd));
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XmtCmd->Buffer.FirstSgeAddress = phys_addr;
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XmtCmd->Buffer.FirstSgeLength = DataLength;
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@ -2838,6 +2961,37 @@ static void sxg_indicate_link_state(struct adapter_t *adapter,
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}
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}
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/*
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* sxg_change_mtu - Change the Maximum Transfer Unit
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* * @returns 0 on success, negative on failure
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*/
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int sxg_change_mtu (struct net_device *netdev, int new_mtu)
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{
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struct adapter_t *adapter = (struct adapter_t *) netdev_priv(netdev);
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if (!((new_mtu == SXG_DEFAULT_MTU) || (new_mtu == SXG_JUMBO_MTU)))
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return -EINVAL;
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if(new_mtu == netdev->mtu)
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return 0;
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netdev->mtu = new_mtu;
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if (new_mtu == SXG_JUMBO_MTU) {
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adapter->JumboEnabled = TRUE;
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adapter->FrameSize = JUMBOMAXFRAME;
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adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE;
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} else {
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adapter->JumboEnabled = FALSE;
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adapter->FrameSize = ETHERMAXFRAME;
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adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE;
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}
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sxg_entry_halt(netdev);
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sxg_entry_open(netdev);
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return 0;
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}
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/*
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* sxg_link_state - Set the link state and if necessary, indicate.
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* This routine the central point of processing for all link state changes.
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@ -3742,6 +3896,7 @@ static int sxg_initialize_adapter(struct adapter_t *adapter)
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u32 RssIds, IsrCount;
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u32 i;
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int status;
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int sxg_rcv_ring_size = SXG_RCV_RING_SIZE;
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt",
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adapter, 0, 0, 0);
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@ -3796,7 +3951,9 @@ static int sxg_initialize_adapter(struct adapter_t *adapter)
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/* Receive ring base and size */
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WRITE_REG64(adapter,
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adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0);
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WRITE_REG(adapter->UcodeRegs[0].RcvSize, SXG_RCV_RING_SIZE, TRUE);
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if (adapter->JumboEnabled == TRUE)
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sxg_rcv_ring_size = SXG_JUMBO_RCV_RING_SIZE;
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WRITE_REG(adapter->UcodeRegs[0].RcvSize, sxg_rcv_ring_size, TRUE);
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/* Populate the card with receive buffers */
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sxg_stock_rcv_buffers(adapter);
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@ -3933,6 +4090,8 @@ static int sxg_fill_descriptor_block(struct adapter_t *adapter,
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static void sxg_stock_rcv_buffers(struct adapter_t *adapter)
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{
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struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr;
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int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS;
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int sxg_min_rcv_data_buffers = SXG_MIN_RCV_DATA_BUFFERS;
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf",
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adapter, adapter->RcvBuffersOnCard,
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@ -3943,7 +4102,9 @@ static void sxg_stock_rcv_buffers(struct adapter_t *adapter)
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* we haven't exceeded our maximum.. get another block of buffers
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* None of this needs to be SMP safe. It's round numbers.
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*/
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if ((adapter->FreeRcvBufferCount < SXG_MIN_RCV_DATA_BUFFERS) &&
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if (adapter->JumboEnabled == TRUE)
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sxg_min_rcv_data_buffers = SXG_MIN_JUMBO_RCV_DATA_BUFFERS;
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if ((adapter->FreeRcvBufferCount < sxg_min_rcv_data_buffers) &&
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(adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) &&
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(atomic_read(&adapter->pending_allocations) == 0)) {
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sxg_allocate_buffer_memory(adapter,
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@ -3953,7 +4114,9 @@ static void sxg_stock_rcv_buffers(struct adapter_t *adapter)
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}
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/* Now grab the RcvQLock lock and proceed */
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spin_lock(&adapter->RcvQLock);
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while (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) {
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if (adapter->JumboEnabled)
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sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS;
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while (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) {
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struct list_entry *_ple;
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/* Get a descriptor block */
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@ -108,7 +108,6 @@ struct sxg_stats {
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#define SXG_DROP_DUMB_SEND(_pAdapt, _skb) { \
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ASSERT(_skb); \
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dev_kfree_skb(_skb); \
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}
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/*
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@ -132,6 +131,9 @@ struct sxg_stats {
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skb->next = NULL; \
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_RcvDataBufferHdr->PhysicalAddress = pci_map_single(adapter->pcidev,\
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_RcvDataBufferHdr->skb->data, BufferSize, PCI_DMA_FROMDEVICE); \
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if (SXG_INVALID_SGL(_RcvDataBufferHdr->PhysicalAddress,BufferSize)) \
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printk(KERN_EMERG "SXG_ALLOCATE_RCV_PACKET: RCV packet" \
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"non-64k boundary aligned\n"); \
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} else { \
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(_RcvDataBufferHdr)->skb = NULL; \
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} \
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@ -758,6 +760,9 @@ struct slic_crash_info {
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#define ETHERMAXFRAME 1514
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#define JUMBOMAXFRAME 9014
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#define SXG_JUMBO_MTU 9000
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#define SXG_DEFAULT_MTU 1500
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#if defined(CONFIG_X86_64) || defined(CONFIG_IA64)
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#define SXG_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & 0x00000000FFFFFFFF)
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#define SXG_GET_ADDR_HIGH(_addr) \
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@ -418,6 +418,7 @@ struct sxg_event_ring {
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#define SXG_XMT_RING_SIZE 128 /* Start with 128 */
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#define SXG_RCV_RING_SIZE 128 /* Start with 128 */
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#define SXG_MAX_ENTRIES 4096
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#define SXG_JUMBO_RCV_RING_SIZE 32
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/* Structure and macros to manage a ring */
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struct sxg_ring_info {
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@ -713,6 +714,11 @@ enum sxg_buffer_type {
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/* Minimum amount and when to get more */
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#define SXG_MIN_RCV_DATA_BUFFERS 4096
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#define SXG_MAX_RCV_BLOCKS 256 /* = 32k receive buffers */
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/* Amount to give to the card in case of jumbo frames */
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#define SXG_JUMBO_RCV_DATA_BUFFERS 2048
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/* Initial pool of buffers in case of jumbo buffers */
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#define SXG_INITIAL_JUMBO_RCV_DATA_BUFFERS 4096
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#define SXG_MIN_JUMBO_RCV_DATA_BUFFERS 1024
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/* Receive buffer header */
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struct sxg_rcv_data_buffer_hdr {
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@ -874,10 +880,8 @@ extern struct sxg_sgl_pool_properties SxgSglPoolProperties[];
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* We currently workaround this issue by allocating SGL buffers
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* in 64k blocks and skipping over buffers that straddle the boundary.
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*/
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#define SXG_INVALID_SGL(_SxgSgl) \
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(((_SxgSgl)->PhysicalAddress.LowPart & 0xFFFF0000) != \
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(((_SxgSgl)->PhysicalAddress.LowPart + \
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SXG_SGL_SIZE((_SxgSgl)->Pool)) & 0xFFFF0000))
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#define SXG_INVALID_SGL(phys_addr,len) \
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(((phys_addr >> 16) != ( (phys_addr + len) >> 16 )))
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/*
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* Allocate SGLs in blocks so we can skip over invalid entries.
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@ -271,10 +271,10 @@ struct sxg_hw_regs {
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/*
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* Macro to determine RCV_CONFIG_BUFLEN based on maximum frame size.
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* We add 18 bytes for Sahara receive status and padding, plus 4 bytes for CRC,
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* and round up to nearest 16 byte boundary
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* and round up to nearest 32 byte boundary
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*/
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#define RCV_CONFIG_BUFSIZE(_MaxFrame) \
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((((_MaxFrame) + 22) + 15) & RCV_CONFIG_BUFLEN_MASK)
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((((_MaxFrame) + 22) + 31) & RCV_CONFIG_BUFLEN_MASK)
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/* XmtConfig register reset */
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#define XMT_CONFIG_RESET 0x80000000
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