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bus: mhi: ep: Add support for handling MHI_RESET
Add support for handling MHI_RESET in MHI endpoint stack. MHI_RESET will be issued by the host during shutdown and during error scenario so that it can recover the endpoint device without restarting the whole device. MHI_RESET handling involves resetting the internal MHI registers, data structures, state machines, resetting all channels/rings and setting MHICTRL.RESET bit to 0. Additionally the device will also move to READY state if the reset was due to SYS_ERR. Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220405135754.6622-12-manivannan.sadhasivam@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -381,6 +381,7 @@ static irqreturn_t mhi_ep_irq(int irq, void *data)
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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enum mhi_state state;
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u32 int_value;
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bool mhi_reset;
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/* Acknowledge the ctrl interrupt */
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int_value = mhi_ep_mmio_read(mhi_cntrl, MHI_CTRL_INT_STATUS);
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@ -389,6 +390,14 @@ static irqreturn_t mhi_ep_irq(int irq, void *data)
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/* Check for ctrl interrupt */
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if (FIELD_GET(MHI_CTRL_INT_STATUS_MSK, int_value)) {
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dev_dbg(dev, "Processing ctrl interrupt\n");
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mhi_ep_mmio_get_mhi_state(mhi_cntrl, &state, &mhi_reset);
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if (mhi_reset) {
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dev_info(dev, "Host triggered MHI reset!\n");
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disable_irq_nosync(mhi_cntrl->irq);
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schedule_work(&mhi_cntrl->reset_work);
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return IRQ_HANDLED;
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}
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mhi_ep_process_ctrl_interrupt(mhi_cntrl, state);
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}
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@ -464,6 +473,49 @@ static void mhi_ep_abort_transfer(struct mhi_ep_cntrl *mhi_cntrl)
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mhi_cntrl->enabled = false;
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}
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static void mhi_ep_reset_worker(struct work_struct *work)
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{
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struct mhi_ep_cntrl *mhi_cntrl = container_of(work, struct mhi_ep_cntrl, reset_work);
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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enum mhi_state cur_state;
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int ret;
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mhi_ep_abort_transfer(mhi_cntrl);
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spin_lock_bh(&mhi_cntrl->state_lock);
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/* Reset MMIO to signal host that the MHI_RESET is completed in endpoint */
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mhi_ep_mmio_reset(mhi_cntrl);
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cur_state = mhi_cntrl->mhi_state;
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spin_unlock_bh(&mhi_cntrl->state_lock);
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/*
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* Only proceed further if the reset is due to SYS_ERR. The host will
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* issue reset during shutdown also and we don't need to do re-init in
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* that case.
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*/
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if (cur_state == MHI_STATE_SYS_ERR) {
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mhi_ep_mmio_init(mhi_cntrl);
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/* Set AMSS EE before signaling ready state */
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mhi_ep_mmio_set_env(mhi_cntrl, MHI_EE_AMSS);
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/* All set, notify the host that we are ready */
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ret = mhi_ep_set_ready_state(mhi_cntrl);
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if (ret)
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return;
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dev_dbg(dev, "READY state notification sent to the host\n");
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ret = mhi_ep_enable(mhi_cntrl);
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if (ret) {
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dev_err(dev, "Failed to enable MHI endpoint: %d\n", ret);
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return;
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}
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enable_irq(mhi_cntrl->irq);
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}
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}
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int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl)
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{
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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@ -738,6 +790,7 @@ int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
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}
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INIT_WORK(&mhi_cntrl->state_work, mhi_ep_state_worker);
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INIT_WORK(&mhi_cntrl->reset_work, mhi_ep_reset_worker);
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mhi_cntrl->wq = alloc_workqueue("mhi_ep_wq", 0, 0);
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if (!mhi_cntrl->wq) {
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@ -76,6 +76,7 @@ struct mhi_ep_db_info {
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* @ch_db_list: List of queued channel doorbells
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* @wq: Dedicated workqueue for handling rings and state changes
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* @state_work: State transition worker
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* @reset_work: Worker for MHI Endpoint reset
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* @raise_irq: CB function for raising IRQ to the host
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* @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
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* @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
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@ -122,6 +123,7 @@ struct mhi_ep_cntrl {
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struct workqueue_struct *wq;
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struct work_struct state_work;
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struct work_struct reset_work;
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void (*raise_irq)(struct mhi_ep_cntrl *mhi_cntrl, u32 vector);
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int (*alloc_map)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t *phys_ptr,
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