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KVM: s390: Optimize paths where get_vcpu_asce() is invoked
During dynamic address translation the get_vcpu_asce() function can be invoked several times. It's ok for usual modes, but will be slow if CPUs are in AR mode. Let's call the get_vcpu_asce() once and pass the result to the called functions. Signed-off-by: Alexander Yarygin <yarygin@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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parent
8ae04b8f50
commit
75a1812230
1 changed files with 12 additions and 13 deletions
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@ -330,6 +330,7 @@ static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val)
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* @vcpu: virtual cpu
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* @gva: guest virtual address
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* @gpa: points to where guest physical (absolute) address should be stored
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* @asce: effective asce
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* @write: indicates if access is a write access
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*
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* Translate a guest virtual address into a guest absolute address by means
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@ -345,7 +346,8 @@ static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val)
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* by the architecture
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*/
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static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
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unsigned long *gpa, int write)
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unsigned long *gpa, const union asce asce,
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int write)
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{
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union vaddress vaddr = {.addr = gva};
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union raddress raddr = {.addr = gva};
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@ -354,12 +356,10 @@ static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
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union ctlreg0 ctlreg0;
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unsigned long ptr;
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int edat1, edat2;
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union asce asce;
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ctlreg0.val = vcpu->arch.sie_block->gcr[0];
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edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
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edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78);
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asce.val = get_vcpu_asce(vcpu);
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if (asce.r)
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goto real_address;
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ptr = asce.origin * 4096;
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@ -506,15 +506,14 @@ static inline int is_low_address(unsigned long ga)
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return (ga & ~0x11fful) == 0;
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}
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static int low_address_protection_enabled(struct kvm_vcpu *vcpu)
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static int low_address_protection_enabled(struct kvm_vcpu *vcpu,
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const union asce asce)
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{
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union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
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psw_t *psw = &vcpu->arch.sie_block->gpsw;
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union asce asce;
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if (!ctlreg0.lap)
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return 0;
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asce.val = get_vcpu_asce(vcpu);
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if (psw_bits(*psw).t && asce.p)
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return 0;
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return 1;
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@ -536,7 +535,7 @@ enum {
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static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga,
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unsigned long *pages, unsigned long nr_pages,
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int write)
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const union asce asce, int write)
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{
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struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
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psw_t *psw = &vcpu->arch.sie_block->gpsw;
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@ -547,7 +546,7 @@ static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga,
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tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
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tec_bits->fsi = write ? FSI_STORE : FSI_FETCH;
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tec_bits->as = psw_bits(*psw).as;
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lap_enabled = low_address_protection_enabled(vcpu);
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lap_enabled = low_address_protection_enabled(vcpu, asce);
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while (nr_pages) {
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ga = kvm_s390_logical_to_effective(vcpu, ga);
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tec_bits->addr = ga >> PAGE_SHIFT;
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@ -557,7 +556,7 @@ static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga,
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}
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ga &= PAGE_MASK;
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if (psw_bits(*psw).t) {
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rc = guest_translate(vcpu, ga, pages, write);
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rc = guest_translate(vcpu, ga, pages, asce, write);
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if (rc < 0)
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return rc;
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if (rc == PGM_PROTECTION)
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@ -604,7 +603,7 @@ int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
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need_ipte_lock = psw_bits(*psw).t && !asce.r;
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if (need_ipte_lock)
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ipte_lock(vcpu);
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rc = guest_page_range(vcpu, ga, pages, nr_pages, write);
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rc = guest_page_range(vcpu, ga, pages, nr_pages, asce, write);
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for (idx = 0; idx < nr_pages && !rc; idx++) {
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gpa = *(pages + idx) + (ga & ~PAGE_MASK);
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_len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
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@ -671,16 +670,16 @@ int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
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tec->as = psw_bits(*psw).as;
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tec->fsi = write ? FSI_STORE : FSI_FETCH;
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tec->addr = gva >> PAGE_SHIFT;
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if (is_low_address(gva) && low_address_protection_enabled(vcpu)) {
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asce.val = get_vcpu_asce(vcpu);
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if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) {
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if (write) {
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rc = pgm->code = PGM_PROTECTION;
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return rc;
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}
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}
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asce.val = get_vcpu_asce(vcpu);
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if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */
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rc = guest_translate(vcpu, gva, gpa, write);
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rc = guest_translate(vcpu, gva, gpa, asce, write);
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if (rc > 0) {
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if (rc == PGM_PROTECTION)
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tec->b61 = 1;
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