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MIPS: jz4740: Correct clock gate bit for DMA controller
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
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[3] = {
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.name = "dma",
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.parent = &jz_clk_high_speed_peripheral.clk,
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.gate_bit = JZ_CLOCK_GATE_UART0,
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.gate_bit = JZ_CLOCK_GATE_DMAC,
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.ops = &jz_clk_simple_ops,
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},
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[4] = {
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