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MIPS: Cleanup the unused __arch_local_irq_restore() function
In history, __arch_local_irq_restore() is only used by SMTC. However, SMTC support has been removed since 3.16, this patch remove the unused function. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12159/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -84,41 +84,11 @@ static inline void arch_local_irq_restore(unsigned long flags)
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: "memory");
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}
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static inline void __arch_local_irq_restore(unsigned long flags)
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{
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__asm__ __volatile__(
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" .set push \n"
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" .set noreorder \n"
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" .set noat \n"
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#if defined(CONFIG_IRQ_MIPS_CPU)
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/*
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* Slow, but doesn't suffer from a relatively unlikely race
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* condition we're having since days 1.
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*/
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" beqz %[flags], 1f \n"
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" di \n"
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" ei \n"
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"1: \n"
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#else
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/*
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* Fast, dangerous. Life is fun, life is good.
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*/
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" mfc0 $1, $12 \n"
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" ins $1, %[flags], 0, 1 \n"
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" mtc0 $1, $12 \n"
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#endif
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" " __stringify(__irq_disable_hazard) " \n"
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" .set pop \n"
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: [flags] "=r" (flags)
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: "0" (flags)
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: "memory");
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}
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#else
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/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
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void arch_local_irq_disable(void);
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unsigned long arch_local_irq_save(void);
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void arch_local_irq_restore(unsigned long flags);
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void __arch_local_irq_restore(unsigned long flags);
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#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
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static inline void arch_local_irq_enable(void)
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@ -57,7 +57,6 @@ notrace void arch_local_irq_disable(void)
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}
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EXPORT_SYMBOL(arch_local_irq_disable);
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notrace unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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@ -111,31 +110,4 @@ notrace void arch_local_irq_restore(unsigned long flags)
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}
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EXPORT_SYMBOL(arch_local_irq_restore);
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notrace void __arch_local_irq_restore(unsigned long flags)
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{
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unsigned long __tmp1;
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preempt_disable();
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__asm__ __volatile__(
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" .set push \n"
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" .set noreorder \n"
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" .set noat \n"
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" mfc0 $1, $12 \n"
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" andi %[flags], 1 \n"
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" ori $1, 0x1f \n"
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" xori $1, 0x1f \n"
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" or %[flags], $1 \n"
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" mtc0 %[flags], $12 \n"
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" " __stringify(__irq_disable_hazard) " \n"
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" .set pop \n"
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: [flags] "=r" (__tmp1)
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: "0" (flags)
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: "memory");
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preempt_enable();
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}
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EXPORT_SYMBOL(__arch_local_irq_restore);
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#endif /* !CONFIG_CPU_MIPSR2 */
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#endif /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR6 */
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