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powerpc/fsl_pci: Fix pci stack build bug with FRAME_WARN
Fix this: CC arch/powerpc/sysdev/fsl_pci.o arch/powerpc/sysdev/fsl_pci.c: In function 'fsl_pcie_check_link': arch/powerpc/sysdev/fsl_pci.c:91:1: error: the frame size of 1360 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] when configuring FRAME_WARN, by refactoring indirect_read_config() to take hose and bus number instead of the 1344-byte struct pci_bus. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -119,6 +119,10 @@ extern void setup_indirect_pci(struct pci_controller* hose,
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extern int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 *val);
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extern int __indirect_read_config(struct pci_controller *hose,
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unsigned char bus_number, unsigned int devfn,
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int offset, int len, u32 *val);
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extern int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 val);
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@ -68,13 +68,10 @@ static int fsl_pcie_check_link(struct pci_controller *hose)
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u32 val = 0;
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if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) {
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if (hose->ops->read == fsl_indirect_read_config) {
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struct pci_bus bus;
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bus.number = hose->first_busno;
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bus.sysdata = hose;
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bus.ops = hose->ops;
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indirect_read_config(&bus, 0, PCIE_LTSSM, 4, &val);
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} else
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if (hose->ops->read == fsl_indirect_read_config)
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__indirect_read_config(hose, hose->first_busno, 0,
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PCIE_LTSSM, 4, &val);
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else
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early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
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if (val < PCIE_LTSSM_L0)
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return 1;
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@ -20,31 +20,31 @@
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#include <asm/pci-bridge.h>
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#include <asm/machdep.h>
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int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 *val)
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int __indirect_read_config(struct pci_controller *hose,
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unsigned char bus_number, unsigned int devfn,
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int offset, int len, u32 *val)
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{
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struct pci_controller *hose = pci_bus_to_host(bus);
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volatile void __iomem *cfg_data;
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u8 cfg_type = 0;
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u32 bus_no, reg;
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if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) {
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if (bus->number != hose->first_busno)
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if (bus_number != hose->first_busno)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (devfn != 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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if (ppc_md.pci_exclude_device)
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if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
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if (ppc_md.pci_exclude_device(hose, bus_number, devfn))
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE)
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if (bus->number != hose->first_busno)
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if (bus_number != hose->first_busno)
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cfg_type = 1;
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bus_no = (bus->number == hose->first_busno) ?
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hose->self_busno : bus->number;
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bus_no = (bus_number == hose->first_busno) ?
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hose->self_busno : bus_number;
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if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)
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reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
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@ -77,6 +77,15 @@ int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
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return PCIBIOS_SUCCESSFUL;
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}
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int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 *val)
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{
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struct pci_controller *hose = pci_bus_to_host(bus);
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return __indirect_read_config(hose, bus->number, devfn, offset, len,
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val);
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}
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int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 val)
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{
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