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https://github.com/torvalds/linux
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arm64: dts: freescale: Add SKOV IMX8MP CPU revB board
Add Skov i.MX8MP based climate controller. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Oleksij Rempel
Shawn Guo
parent
c8e6e06ede
commit
6d382d51d9
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@ -116,6 +116,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
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711
arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi
Normal file
711
arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi
Normal file
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@ -0,0 +1,711 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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#include "imx8mp.dtsi"
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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/* some of this aliases like backlight0, ethernetX and switch0
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* are needed for the bootloader.
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*/
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backlight0 = &backlight;
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ethernet0 = &eqos;
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ethernet1 = &lan1;
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ethernet2 = &lan2;
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rtc0 = &i2c_rtc;
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rtc1 = &snvs_rtc;
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switch0 = &switch;
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};
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/*
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* Backlight is present only on some of boards, so it is disabled by
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* default.
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*/
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backlight: backlight {
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compatible = "pwm-backlight";
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pinctrl-0 = <&pinctrl_backlight>;
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pwms = <&pwm1 0 20000 0>;
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power-supply = <®_24v>;
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enable-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
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brightness-levels = <0 255>;
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num-interpolated-steps = <17>;
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default-brightness-level = <8>;
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status = "disabled";
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_led>;
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led-0 {
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label = "D1";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_STATUS;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-1 {
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label = "D2";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-2 {
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label = "D3";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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reg_1v2: regulator-1v2 {
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compatible = "regulator-fixed";
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vin-supply = <®_5v_p>;
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regulator-name = "1V2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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reg_2v5: regulator-2v5 {
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compatible = "regulator-fixed";
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vin-supply = <®_5v_s>;
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regulator-name = "2V5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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vin-supply = <®_5v_s>;
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regulator-name = "3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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/*
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* This regulator will provide power as long as possible even if
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* undervoltage is detected.
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*/
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reg_5v_p: regulator-5v-p {
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compatible = "regulator-fixed";
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regulator-name = "5V_P";
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vin-supply = <®_24v>;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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/*
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* This regulator will be automatically shutdown if undervoltage is
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* detected.
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*/
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reg_5v_s: regulator-5v-s {
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compatible = "regulator-fixed";
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regulator-name = "5V_S";
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vin-supply = <®_24v>;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_24v: regulator-24v {
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compatible = "regulator-fixed";
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regulator-name = "24V";
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regulator-min-microvolt = <24000000>;
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regulator-max-microvolt = <24000000>;
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};
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reg_can2rs: regulator-can2rs {
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compatible = "regulator-fixed";
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regulator-name = "CAN2RS";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can2rs>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
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};
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reg_canrs: regulator-canrs {
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compatible = "regulator-fixed";
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regulator-name = "CANRS";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_canrs>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
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};
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reg_tft_vcom: regulator-tft-vcom {
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compatible = "pwm-regulator";
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pwms = <&pwm4 0 20000 0>;
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regulator-name = "VCOM";
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vin-supply = <®_5v_s>;
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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regulator-always-on;
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voltage-table = <3600000 26>;
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status = "disabled";
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};
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reg_vsd_3v3: regulator-vsd-3v3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_vsd_3v3>;
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vin-supply = <®_vdd_3v3>;
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compatible = "regulator-fixed";
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&A53_0 {
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cpu-supply = <®_vdd_arm>;
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};
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&A53_1 {
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cpu-supply = <®_vdd_arm>;
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};
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&A53_2 {
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cpu-supply = <®_vdd_arm>;
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};
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&A53_3 {
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cpu-supply = <®_vdd_arm>;
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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status = "okay";
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adc: adc@0 {
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compatible = "microchip,mcp3002";
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reg = <0>;
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vref-supply = <®_vdd_3v3>;
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spi-max-frequency = <1000000>;
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#io-channel-cells = <1>;
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};
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};
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&eqos {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos>;
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phy-mode = "rgmii-txid";
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_canrs>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_can2rs>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@25 {
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compatible = "nxp,pca9450c";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupts-extended = <&gpio1 3 IRQ_TYPE_EDGE_RISING>;
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sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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regulators {
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reg_vdd_soc: BUCK1 {
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regulator-name = "VDD_SOC";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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reg_vdd_arm: BUCK2 {
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regulator-name = "VDD_ARM";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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};
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reg_vdd_3v3: BUCK4 {
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regulator-name = "VDD_3V3";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdd_1v8: BUCK5 {
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regulator-name = "VDD_1V8";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_nvcc_dram_1v1: BUCK6 {
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regulator-name = "NVCC_DRAM_1V1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_nvcc_snvs_1v8: LDO1 {
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regulator-name = "NVCC_SNVS_1V8";
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdda_1v8: LDO3 {
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regulator-name = "VDDA_1V8";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_nvcc_sd2: LDO5 {
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regulator-name = "NVCC_SD2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <®_5v_p>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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i2c_rtc: rtc@51 {
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compatible = "nxp,pcf85063tp";
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reg = <0x51>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupts-extended = <&gpio4 31 IRQ_TYPE_EDGE_FALLING>;
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quartz-load-femtofarads = <12500>;
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};
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};
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&i2c4 {
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clock-frequency = <380000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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status = "okay";
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switch: switch@5f {
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compatible = "microchip,ksz9893";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_switch>;
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reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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reg = <0x5f>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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lan1: port@0 {
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reg = <0>;
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phy-mode = "internal";
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label = "lan1";
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};
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lan2: port@1 {
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reg = <1>;
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phy-mode = "internal";
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "cpu";
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ethernet = <&eqos>;
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phy-mode = "rgmii";
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/* 2ns RX delay is implemented on PCB */
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tx-internal-delay-ps = <2000>;
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rx-internal-delay-ps = <0>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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};
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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/* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&usb3_phy0 {
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vbus-supply = <®_3v3>;
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status = "okay";
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};
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&usb3_phy1 {
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vbus-supply = <®_3v3>;
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status = "okay";
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};
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&usb_dwc3_0 {
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dr_mode = "host";
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};
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&usb_dwc3_1 {
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dr_mode = "host";
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};
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/* SD Card */
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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vmmc-supply = <®_vsd_3v3>;
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vqmmc-supply = <®_nvcc_sd2>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
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bus-width = <4>;
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status = "okay";
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||||
};
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||||
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||||
/* eMMC */
|
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&usdhc3 {
|
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assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
|
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assigned-clock-rates = <400000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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vmmc-supply = <®_vdd_3v3>;
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vqmmc-supply = <®_vdd_1v8>;
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bus-width = <8>;
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no-sd;
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no-sdio;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_backlight: backlightgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x0100
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_can2rs: can2rsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_canrs: canrsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi2: ecspi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x44
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x44
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x44
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_eqos: eqosgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
|
||||
MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
|
||||
MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
|
||||
MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
|
||||
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
|
||||
MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
|
||||
MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f
|
||||
MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f
|
||||
MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f
|
||||
MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f
|
||||
MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
|
||||
MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
|
||||
MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan2: flexcan2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX 0x154
|
||||
MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_led: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x19
|
||||
MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x19
|
||||
MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicirqgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41
|
||||
MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x116
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x116
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_vsd_3v3: regvsd3v3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_rtc: rtcgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_switch: switchgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x41
|
||||
MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_touchscreen: touchscreengrp {
|
||||
fsl,pins = <
|
||||
/* external 10 k pull up */
|
||||
/* CTP_INT */
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
|
||||
/* CTP_RST */
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
MX8MP_IOMUXC_UART3_RXD__UART1_DTE_RTS 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x14f
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x14f
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x1c4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
20
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts
Normal file
20
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp-skov-reva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SKOV IMX8MP CPU revB - HDMI";
|
||||
compatible = "skov,imx8mp-skov-revb-hdmi", "fsl,imx8mp";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_hdmi: hdmigrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3
|
||||
MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3
|
||||
MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19
|
||||
>;
|
||||
};
|
||||
};
|
||||
101
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
Normal file
101
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
Normal file
|
|
@ -0,0 +1,101 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp-skov-reva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SKOV IMX8MP CPU revB - LT6";
|
||||
compatible = "skov,imx8mp-skov-revb-lt6", "fsl,imx8mp";
|
||||
|
||||
touchscreen {
|
||||
compatible = "resistive-adc-touch";
|
||||
io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, <&adc_ts 5>;
|
||||
io-channel-names = "y", "z1", "z2", "x";
|
||||
touchscreen-min-pressure = <65000>;
|
||||
touchscreen-inverted-y;
|
||||
touchscreen-swapped-x-y;
|
||||
touchscreen-x-plate-ohms = <300>;
|
||||
};
|
||||
};
|
||||
|
||||
®_tft_vcom {
|
||||
regulator-min-microvolt = <3600000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
voltage-table = <3600000 26>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&backlight {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecspi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
||||
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
adc_ts: adc@0 {
|
||||
compatible = "ti,tsc2046e-adc";
|
||||
reg = <0>;
|
||||
pinctrl-0 = <&pinctrl_touch>;
|
||||
pinctrl-names ="default";
|
||||
spi-max-frequency = <1000000>;
|
||||
interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
|
||||
#io-channel-cells = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
settling-time-us = <700>;
|
||||
oversampling-ratio = <5>;
|
||||
};
|
||||
|
||||
channel@3 {
|
||||
reg = <3>;
|
||||
settling-time-us = <700>;
|
||||
oversampling-ratio = <5>;
|
||||
};
|
||||
|
||||
channel@4 {
|
||||
reg = <4>;
|
||||
settling-time-us = <700>;
|
||||
oversampling-ratio = <5>;
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
reg = <5>;
|
||||
settling-time-us = <700>;
|
||||
oversampling-ratio = <5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_ecspi1: ecspi1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x44
|
||||
MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x44
|
||||
MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x44
|
||||
MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_touch: touchgrp {
|
||||
fsl,pins = <
|
||||
/* external pull up */
|
||||
MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp-skov-reva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SKOV IMX8MP CPU revB - MI1010AIT-1CP1";
|
||||
compatible = "skov,imx8mp-skov-revb-mi1010ait-1cp1", "fsl,imx8mp";
|
||||
|
||||
panel {
|
||||
compatible = "multi-inno,mi1010ait-1cp";
|
||||
backlight = <&backlight>;
|
||||
power-supply = <®_tft_vcom>;
|
||||
|
||||
port {
|
||||
in_lvds0: endpoint {
|
||||
remote-endpoint = <&ldb_lvds_ch0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&backlight {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
touchscreen@38 {
|
||||
compatible = "edt,edt-ft5406";
|
||||
reg = <0x38>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_touchscreen>;
|
||||
interrupts-extended = <&gpio4 28 IRQ_TYPE_EDGE_FALLING>;
|
||||
reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
||||
touchscreen-size-x = <1280>;
|
||||
touchscreen-size-y = <800>;
|
||||
vcc-supply = <®_vdd_3v3>;
|
||||
iovcc-supply = <®_vdd_3v3>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&lcdif2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&lvds_bridge {
|
||||
/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */
|
||||
assigned-clock-rates = <482300000>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
ldb_lvds_ch0: endpoint {
|
||||
remote-endpoint = <&in_lvds0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&media_blk_ctrl {
|
||||
/* currently it is not possible to let display clocks confugure
|
||||
* automatically, so we need to set them manually
|
||||
*/
|
||||
assigned-clock-rates = <500000000>, <200000000>, <0>,
|
||||
/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */
|
||||
<68900000>,
|
||||
/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */
|
||||
<964600000>;
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
®_tft_vcom {
|
||||
regulator-min-microvolt = <3160000>;
|
||||
regulator-max-microvolt = <3160000>;
|
||||
voltage-table = <3160000 73>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in a new issue