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ARM: LPC32xx: Adjust dtsi file for MLC controller configuration

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This patch takes into account that the MTD NAND MLC controller needs more
registers, located actually before the previously allocated memory range,
already starting at 200a8000 instead of 200b0000.

Further, the interrupt for the controller is configured.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
This commit is contained in:
Roland Stigge 2012-06-14 16:16:17 +02:00
parent d807af4793
commit 6d1c3e93e3
1 changed files with 3 additions and 2 deletions
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5
arch/arm/boot/dts/lpc32xx.dtsi
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@ -38,9 +38,10 @@ slc: flash@20020000 {
status = "disable";
};
mlc: flash@200B0000 {
mlc: flash@200a8000 {
compatible = "nxp,lpc3220-mlc";
reg = <0x200B0000 0x1000>;
reg = <0x200a8000 0x11000>;
interrupts = <11 0>;
status = "disable";
};