mirror of
https://github.com/torvalds/linux
synced 2024-09-23 04:49:22 +00:00
sfc: Make queue flushes more reliable
Increase the potential retry count for RX flushes from 5 to 100. Stop polling the RX_DESC_PTR_TBL to infer that a flush might have happened. Instead absolutely rely on the flush events, unless bug 7803 applies (Falcon rev A only). To keep things quick, request flushes for every TX and RX queue up front, and match up the events to requests. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
parent
92ade881b2
commit
6bc5d3a933
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@ -445,10 +445,17 @@ static void efx_fini_channels(struct efx_nic *efx)
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struct efx_channel *channel;
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struct efx_channel *channel;
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struct efx_tx_queue *tx_queue;
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struct efx_tx_queue *tx_queue;
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struct efx_rx_queue *rx_queue;
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struct efx_rx_queue *rx_queue;
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int rc;
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EFX_ASSERT_RESET_SERIALISED(efx);
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EFX_ASSERT_RESET_SERIALISED(efx);
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BUG_ON(efx->port_enabled);
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BUG_ON(efx->port_enabled);
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rc = falcon_flush_queues(efx);
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if (rc)
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EFX_ERR(efx, "failed to flush queues\n");
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else
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EFX_LOG(efx, "successfully flushed all queues\n");
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efx_for_each_channel(channel, efx) {
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efx_for_each_channel(channel, efx) {
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EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
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EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
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@ -456,13 +463,6 @@ static void efx_fini_channels(struct efx_nic *efx)
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efx_fini_rx_queue(rx_queue);
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efx_fini_rx_queue(rx_queue);
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efx_for_each_channel_tx_queue(tx_queue, channel)
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efx_for_each_channel_tx_queue(tx_queue, channel)
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efx_fini_tx_queue(tx_queue);
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efx_fini_tx_queue(tx_queue);
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}
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/* Do the event queues last so that we can handle flush events
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* for all DMA queues. */
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efx_for_each_channel(channel, efx) {
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EFX_LOG(channel->efx, "shut down evq %d\n", channel->channel);
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efx_fini_eventq(channel);
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efx_fini_eventq(channel);
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}
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}
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}
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}
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@ -1092,7 +1092,6 @@ static void efx_stop_all(struct efx_nic *efx)
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/* Isolate the MAC from the TX and RX engines, so that queue
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/* Isolate the MAC from the TX and RX engines, so that queue
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* flushes will complete in a timely fashion. */
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* flushes will complete in a timely fashion. */
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falcon_deconfigure_mac_wrapper(efx);
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falcon_drain_tx_fifo(efx);
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falcon_drain_tx_fifo(efx);
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/* Stop the kernel transmit interface late, so the watchdog
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/* Stop the kernel transmit interface late, so the watchdog
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@ -108,10 +108,10 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold");
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/* Max number of internal errors. After this resets will not be performed */
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/* Max number of internal errors. After this resets will not be performed */
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#define FALCON_MAX_INT_ERRORS 4
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#define FALCON_MAX_INT_ERRORS 4
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/* Maximum period that we wait for flush events. If the flush event
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/* We poll for events every FLUSH_INTERVAL ms, and check FLUSH_POLL_COUNT times
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* doesn't arrive in this period of time then we check if the queue
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*/
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* was disabled anyway. */
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#define FALCON_FLUSH_INTERVAL 10
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#define FALCON_FLUSH_TIMEOUT 10 /* 10ms */
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#define FALCON_FLUSH_POLL_COUNT 100
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/**************************************************************************
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/**************************************************************************
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*
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*
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@ -452,6 +452,8 @@ void falcon_init_tx(struct efx_tx_queue *tx_queue)
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efx_oword_t tx_desc_ptr;
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efx_oword_t tx_desc_ptr;
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struct efx_nic *efx = tx_queue->efx;
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struct efx_nic *efx = tx_queue->efx;
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tx_queue->flushed = false;
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/* Pin TX descriptor ring */
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/* Pin TX descriptor ring */
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falcon_init_special_buffer(efx, &tx_queue->txd);
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falcon_init_special_buffer(efx, &tx_queue->txd);
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@ -492,60 +494,16 @@ void falcon_init_tx(struct efx_tx_queue *tx_queue)
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}
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}
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}
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}
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static int falcon_flush_tx_queue(struct efx_tx_queue *tx_queue)
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static void falcon_flush_tx_queue(struct efx_tx_queue *tx_queue)
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{
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{
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struct efx_nic *efx = tx_queue->efx;
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struct efx_nic *efx = tx_queue->efx;
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struct efx_channel *channel = &efx->channel[0];
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efx_oword_t tx_flush_descq;
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efx_oword_t tx_flush_descq;
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unsigned int read_ptr, i;
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/* Post a flush command */
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/* Post a flush command */
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EFX_POPULATE_OWORD_2(tx_flush_descq,
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EFX_POPULATE_OWORD_2(tx_flush_descq,
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TX_FLUSH_DESCQ_CMD, 1,
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TX_FLUSH_DESCQ_CMD, 1,
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TX_FLUSH_DESCQ, tx_queue->queue);
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TX_FLUSH_DESCQ, tx_queue->queue);
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falcon_write(efx, &tx_flush_descq, TX_FLUSH_DESCQ_REG_KER);
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falcon_write(efx, &tx_flush_descq, TX_FLUSH_DESCQ_REG_KER);
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msleep(FALCON_FLUSH_TIMEOUT);
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if (EFX_WORKAROUND_7803(efx))
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return 0;
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/* Look for a flush completed event */
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read_ptr = channel->eventq_read_ptr;
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for (i = 0; i < FALCON_EVQ_SIZE; ++i) {
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efx_qword_t *event = falcon_event(channel, read_ptr);
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int ev_code, ev_sub_code, ev_queue;
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if (!falcon_event_present(event))
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break;
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ev_code = EFX_QWORD_FIELD(*event, EV_CODE);
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ev_sub_code = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_CODE);
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ev_queue = EFX_QWORD_FIELD(*event, DRIVER_EV_TX_DESCQ_ID);
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if ((ev_sub_code == TX_DESCQ_FLS_DONE_EV_DECODE) &&
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(ev_queue == tx_queue->queue)) {
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EFX_LOG(efx, "tx queue %d flush command succesful\n",
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tx_queue->queue);
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return 0;
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}
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read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
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}
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if (EFX_WORKAROUND_11557(efx)) {
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efx_oword_t reg;
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bool enabled;
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falcon_read_table(efx, ®, efx->type->txd_ptr_tbl_base,
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tx_queue->queue);
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enabled = EFX_OWORD_FIELD(reg, TX_DESCQ_EN);
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if (!enabled) {
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EFX_LOG(efx, "tx queue %d disabled without a "
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"flush event seen\n", tx_queue->queue);
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return 0;
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}
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}
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EFX_ERR(efx, "tx queue %d flush command timed out\n", tx_queue->queue);
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return -ETIMEDOUT;
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}
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}
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void falcon_fini_tx(struct efx_tx_queue *tx_queue)
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void falcon_fini_tx(struct efx_tx_queue *tx_queue)
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@ -553,9 +511,8 @@ void falcon_fini_tx(struct efx_tx_queue *tx_queue)
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struct efx_nic *efx = tx_queue->efx;
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struct efx_nic *efx = tx_queue->efx;
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efx_oword_t tx_desc_ptr;
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efx_oword_t tx_desc_ptr;
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/* Stop the hardware using the queue */
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/* The queue should have been flushed */
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if (falcon_flush_tx_queue(tx_queue))
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WARN_ON(!tx_queue->flushed);
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EFX_ERR(efx, "failed to flush tx queue %d\n", tx_queue->queue);
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/* Remove TX descriptor ring from card */
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/* Remove TX descriptor ring from card */
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EFX_ZERO_OWORD(tx_desc_ptr);
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EFX_ZERO_OWORD(tx_desc_ptr);
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@ -643,6 +600,8 @@ void falcon_init_rx(struct efx_rx_queue *rx_queue)
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rx_queue->queue, rx_queue->rxd.index,
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rx_queue->queue, rx_queue->rxd.index,
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rx_queue->rxd.index + rx_queue->rxd.entries - 1);
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rx_queue->rxd.index + rx_queue->rxd.entries - 1);
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rx_queue->flushed = false;
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/* Pin RX descriptor ring */
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/* Pin RX descriptor ring */
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falcon_init_special_buffer(efx, &rx_queue->rxd);
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falcon_init_special_buffer(efx, &rx_queue->rxd);
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@ -663,11 +622,9 @@ void falcon_init_rx(struct efx_rx_queue *rx_queue)
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rx_queue->queue);
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rx_queue->queue);
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}
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}
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static int falcon_flush_rx_queue(struct efx_rx_queue *rx_queue)
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static void falcon_flush_rx_queue(struct efx_rx_queue *rx_queue)
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{
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{
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struct efx_nic *efx = rx_queue->efx;
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struct efx_nic *efx = rx_queue->efx;
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struct efx_channel *channel = &efx->channel[0];
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unsigned int read_ptr, i;
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efx_oword_t rx_flush_descq;
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efx_oword_t rx_flush_descq;
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/* Post a flush command */
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/* Post a flush command */
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@ -675,76 +632,15 @@ static int falcon_flush_rx_queue(struct efx_rx_queue *rx_queue)
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RX_FLUSH_DESCQ_CMD, 1,
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RX_FLUSH_DESCQ_CMD, 1,
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RX_FLUSH_DESCQ, rx_queue->queue);
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RX_FLUSH_DESCQ, rx_queue->queue);
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falcon_write(efx, &rx_flush_descq, RX_FLUSH_DESCQ_REG_KER);
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falcon_write(efx, &rx_flush_descq, RX_FLUSH_DESCQ_REG_KER);
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msleep(FALCON_FLUSH_TIMEOUT);
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if (EFX_WORKAROUND_7803(efx))
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return 0;
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/* Look for a flush completed event */
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read_ptr = channel->eventq_read_ptr;
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for (i = 0; i < FALCON_EVQ_SIZE; ++i) {
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efx_qword_t *event = falcon_event(channel, read_ptr);
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int ev_code, ev_sub_code, ev_queue;
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bool ev_failed;
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if (!falcon_event_present(event))
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break;
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ev_code = EFX_QWORD_FIELD(*event, EV_CODE);
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ev_sub_code = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_CODE);
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ev_queue = EFX_QWORD_FIELD(*event, DRIVER_EV_RX_DESCQ_ID);
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ev_failed = EFX_QWORD_FIELD(*event, DRIVER_EV_RX_FLUSH_FAIL);
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if ((ev_sub_code == RX_DESCQ_FLS_DONE_EV_DECODE) &&
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(ev_queue == rx_queue->queue)) {
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if (ev_failed) {
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EFX_INFO(efx, "rx queue %d flush command "
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"failed\n", rx_queue->queue);
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return -EAGAIN;
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} else {
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EFX_LOG(efx, "rx queue %d flush command "
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"succesful\n", rx_queue->queue);
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return 0;
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}
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}
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read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
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}
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if (EFX_WORKAROUND_11557(efx)) {
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efx_oword_t reg;
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bool enabled;
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falcon_read_table(efx, ®, efx->type->rxd_ptr_tbl_base,
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rx_queue->queue);
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enabled = EFX_OWORD_FIELD(reg, RX_DESCQ_EN);
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if (!enabled) {
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EFX_LOG(efx, "rx queue %d disabled without a "
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"flush event seen\n", rx_queue->queue);
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return 0;
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}
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}
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EFX_ERR(efx, "rx queue %d flush command timed out\n", rx_queue->queue);
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return -ETIMEDOUT;
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}
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}
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void falcon_fini_rx(struct efx_rx_queue *rx_queue)
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void falcon_fini_rx(struct efx_rx_queue *rx_queue)
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{
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{
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efx_oword_t rx_desc_ptr;
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efx_oword_t rx_desc_ptr;
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struct efx_nic *efx = rx_queue->efx;
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struct efx_nic *efx = rx_queue->efx;
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int i, rc;
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/* Try and flush the rx queue. This may need to be repeated */
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/* The queue should already have been flushed */
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for (i = 0; i < 5; i++) {
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WARN_ON(!rx_queue->flushed);
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rc = falcon_flush_rx_queue(rx_queue);
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if (rc == -EAGAIN)
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continue;
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break;
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}
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if (rc) {
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EFX_ERR(efx, "failed to flush rx queue %d\n", rx_queue->queue);
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efx_schedule_reset(efx, RESET_TYPE_INVISIBLE);
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}
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/* Remove RX descriptor ring from card */
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/* Remove RX descriptor ring from card */
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EFX_ZERO_OWORD(rx_desc_ptr);
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EFX_ZERO_OWORD(rx_desc_ptr);
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@ -1255,6 +1151,121 @@ void falcon_generate_test_event(struct efx_channel *channel, unsigned int magic)
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falcon_generate_event(channel, &test_event);
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falcon_generate_event(channel, &test_event);
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}
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}
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/**************************************************************************
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*
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* Flush handling
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*
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**************************************************************************/
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static void falcon_poll_flush_events(struct efx_nic *efx)
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{
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struct efx_channel *channel = &efx->channel[0];
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struct efx_tx_queue *tx_queue;
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struct efx_rx_queue *rx_queue;
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unsigned int read_ptr, i;
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read_ptr = channel->eventq_read_ptr;
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for (i = 0; i < FALCON_EVQ_SIZE; ++i) {
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efx_qword_t *event = falcon_event(channel, read_ptr);
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int ev_code, ev_sub_code, ev_queue;
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bool ev_failed;
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if (!falcon_event_present(event))
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break;
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ev_code = EFX_QWORD_FIELD(*event, EV_CODE);
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if (ev_code != DRIVER_EV_DECODE)
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continue;
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ev_sub_code = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_CODE);
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switch (ev_sub_code) {
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case TX_DESCQ_FLS_DONE_EV_DECODE:
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ev_queue = EFX_QWORD_FIELD(*event,
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DRIVER_EV_TX_DESCQ_ID);
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if (ev_queue < EFX_TX_QUEUE_COUNT) {
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tx_queue = efx->tx_queue + ev_queue;
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tx_queue->flushed = true;
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}
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break;
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case RX_DESCQ_FLS_DONE_EV_DECODE:
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ev_queue = EFX_QWORD_FIELD(*event,
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DRIVER_EV_RX_DESCQ_ID);
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ev_failed = EFX_QWORD_FIELD(*event,
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DRIVER_EV_RX_FLUSH_FAIL);
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if (ev_queue < efx->n_rx_queues) {
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rx_queue = efx->rx_queue + ev_queue;
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/* retry the rx flush */
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if (ev_failed)
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falcon_flush_rx_queue(rx_queue);
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else
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rx_queue->flushed = true;
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}
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break;
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}
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read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
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}
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}
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/* Handle tx and rx flushes at the same time, since they run in
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* parallel in the hardware and there's no reason for us to
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* serialise them */
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int falcon_flush_queues(struct efx_nic *efx)
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{
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struct efx_rx_queue *rx_queue;
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struct efx_tx_queue *tx_queue;
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int i;
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bool outstanding;
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/* Issue flush requests */
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efx_for_each_tx_queue(tx_queue, efx) {
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tx_queue->flushed = false;
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falcon_flush_tx_queue(tx_queue);
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}
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efx_for_each_rx_queue(rx_queue, efx) {
|
||||||
|
rx_queue->flushed = false;
|
||||||
|
falcon_flush_rx_queue(rx_queue);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Poll the evq looking for flush completions. Since we're not pushing
|
||||||
|
* any more rx or tx descriptors at this point, we're in no danger of
|
||||||
|
* overflowing the evq whilst we wait */
|
||||||
|
for (i = 0; i < FALCON_FLUSH_POLL_COUNT; ++i) {
|
||||||
|
msleep(FALCON_FLUSH_INTERVAL);
|
||||||
|
falcon_poll_flush_events(efx);
|
||||||
|
|
||||||
|
/* Check if every queue has been succesfully flushed */
|
||||||
|
outstanding = false;
|
||||||
|
efx_for_each_tx_queue(tx_queue, efx)
|
||||||
|
outstanding |= !tx_queue->flushed;
|
||||||
|
efx_for_each_rx_queue(rx_queue, efx)
|
||||||
|
outstanding |= !rx_queue->flushed;
|
||||||
|
if (!outstanding)
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Mark the queues as all flushed. We're going to return failure
|
||||||
|
* leading to a reset, or fake up success anyway. "flushed" now
|
||||||
|
* indicates that we tried to flush. */
|
||||||
|
efx_for_each_tx_queue(tx_queue, efx) {
|
||||||
|
if (!tx_queue->flushed)
|
||||||
|
EFX_ERR(efx, "tx queue %d flush command timed out\n",
|
||||||
|
tx_queue->queue);
|
||||||
|
tx_queue->flushed = true;
|
||||||
|
}
|
||||||
|
efx_for_each_rx_queue(rx_queue, efx) {
|
||||||
|
if (!rx_queue->flushed)
|
||||||
|
EFX_ERR(efx, "rx queue %d flush command timed out\n",
|
||||||
|
rx_queue->queue);
|
||||||
|
rx_queue->flushed = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (EFX_WORKAROUND_7803(efx))
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
return -ETIMEDOUT;
|
||||||
|
}
|
||||||
|
|
||||||
/**************************************************************************
|
/**************************************************************************
|
||||||
*
|
*
|
||||||
|
|
|
@ -86,6 +86,7 @@ extern void falcon_fini_interrupt(struct efx_nic *efx);
|
||||||
extern int falcon_probe_nic(struct efx_nic *efx);
|
extern int falcon_probe_nic(struct efx_nic *efx);
|
||||||
extern int falcon_probe_resources(struct efx_nic *efx);
|
extern int falcon_probe_resources(struct efx_nic *efx);
|
||||||
extern int falcon_init_nic(struct efx_nic *efx);
|
extern int falcon_init_nic(struct efx_nic *efx);
|
||||||
|
extern int falcon_flush_queues(struct efx_nic *efx);
|
||||||
extern int falcon_reset_hw(struct efx_nic *efx, enum reset_type method);
|
extern int falcon_reset_hw(struct efx_nic *efx, enum reset_type method);
|
||||||
extern void falcon_remove_resources(struct efx_nic *efx);
|
extern void falcon_remove_resources(struct efx_nic *efx);
|
||||||
extern void falcon_remove_nic(struct efx_nic *efx);
|
extern void falcon_remove_nic(struct efx_nic *efx);
|
||||||
|
|
|
@ -160,6 +160,7 @@ struct efx_tx_buffer {
|
||||||
* @channel: The associated channel
|
* @channel: The associated channel
|
||||||
* @buffer: The software buffer ring
|
* @buffer: The software buffer ring
|
||||||
* @txd: The hardware descriptor ring
|
* @txd: The hardware descriptor ring
|
||||||
|
* @flushed: Used when handling queue flushing
|
||||||
* @read_count: Current read pointer.
|
* @read_count: Current read pointer.
|
||||||
* This is the number of buffers that have been removed from both rings.
|
* This is the number of buffers that have been removed from both rings.
|
||||||
* @stopped: Stopped count.
|
* @stopped: Stopped count.
|
||||||
|
@ -192,6 +193,7 @@ struct efx_tx_queue {
|
||||||
struct efx_nic *nic;
|
struct efx_nic *nic;
|
||||||
struct efx_tx_buffer *buffer;
|
struct efx_tx_buffer *buffer;
|
||||||
struct efx_special_buffer txd;
|
struct efx_special_buffer txd;
|
||||||
|
bool flushed;
|
||||||
|
|
||||||
/* Members used mainly on the completion path */
|
/* Members used mainly on the completion path */
|
||||||
unsigned int read_count ____cacheline_aligned_in_smp;
|
unsigned int read_count ____cacheline_aligned_in_smp;
|
||||||
|
@ -260,6 +262,7 @@ struct efx_rx_buffer {
|
||||||
* the remaining space in the allocation.
|
* the remaining space in the allocation.
|
||||||
* @buf_dma_addr: Page's DMA address.
|
* @buf_dma_addr: Page's DMA address.
|
||||||
* @buf_data: Page's host address.
|
* @buf_data: Page's host address.
|
||||||
|
* @flushed: Use when handling queue flushing
|
||||||
*/
|
*/
|
||||||
struct efx_rx_queue {
|
struct efx_rx_queue {
|
||||||
struct efx_nic *efx;
|
struct efx_nic *efx;
|
||||||
|
@ -285,6 +288,7 @@ struct efx_rx_queue {
|
||||||
struct page *buf_page;
|
struct page *buf_page;
|
||||||
dma_addr_t buf_dma_addr;
|
dma_addr_t buf_dma_addr;
|
||||||
char *buf_data;
|
char *buf_data;
|
||||||
|
bool flushed;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
Loading…
Reference in a new issue