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mfd: sec: Add register cache for interrupt mask registers

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The performance of regmap-irq is improved if the interrupt mask registers
can be cached since it does read/modify/update cycles so start using the
register cache infrastructure for those registers. We should use this more
widely but I don't have a datasheet and this is a nice, conservative
starting point.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Mark Brown 2013-07-02 18:51:16 +01:00 committed by Samuel Ortiz
parent 1d057b8539
commit 6b845ba934
1 changed files with 31 additions and 0 deletions
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31
drivers/mfd/sec-core.c
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@ -106,6 +106,31 @@ int sec_reg_update(struct sec_pmic_dev *sec_pmic, u8 reg, u8 val, u8 mask)
}
EXPORT_SYMBOL_GPL(sec_reg_update);
static bool s2mps11_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case S2MPS11_REG_INT1M:
case S2MPS11_REG_INT2M:
case S2MPS11_REG_INT3M:
return false;
default:
return true;
}
}
static bool s5m8763_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case S5M8763_REG_IRQM1:
case S5M8763_REG_IRQM2:
case S5M8763_REG_IRQM3:
case S5M8763_REG_IRQM4:
return false;
default:
return true;
}
}
static struct regmap_config sec_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@ -116,6 +141,8 @@ static struct regmap_config s2mps11_regmap_config = {
.val_bits = 8,
.max_register = S2MPS11_REG_L38CTRL,
.volatile_reg = s2mps11_volatile,
.cache_type = REGCACHE_FLAT,
};
static struct regmap_config s5m8763_regmap_config = {
@ -123,6 +150,8 @@ static struct regmap_config s5m8763_regmap_config = {
.val_bits = 8,
.max_register = S5M8763_REG_LBCNFG2,
.volatile_reg = s5m8763_volatile,
.cache_type = REGCACHE_FLAT,
};
static struct regmap_config s5m8767_regmap_config = {
@ -130,6 +159,8 @@ static struct regmap_config s5m8767_regmap_config = {
.val_bits = 8,
.max_register = S5M8767_REG_LDO28CTRL,
.volatile_reg = s2mps11_volatile,
.cache_type = REGCACHE_FLAT,
};
#ifdef CONFIG_OF