mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
This commit is contained in:
David Woodhouse
commit
69887ac1dc
34 changed files with 906 additions and 501 deletions
|
|
@ -478,7 +478,7 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
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{
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unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
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s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate) * 2;
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s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
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printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
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print_mhz(s3c2440_clk_upll.rate));
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|
|
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@ -192,9 +192,11 @@ void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
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iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
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iotable_init(mach_desc, size);
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/* rename any peripherals used differing from the s3c2410 */
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s3c_device_i2c.name = "s3c2440-i2c";
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s3c_device_i2c.name = "s3c2440-i2c";
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s3c_device_nand.name = "s3c2440-nand";
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/* change irq for watchdog */
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@ -225,7 +227,7 @@ void __init s3c2440_init_clocks(int xtal)
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break;
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case S3C2440_CLKDIVN_HDIVN_2:
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hdiv = 1;
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hdiv = 2;
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break;
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case S3C2440_CLKDIVN_HDIVN_4_8:
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|
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@ -412,21 +412,20 @@ config CPU_BPREDICT_DISABLE
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config TLS_REG_EMUL
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bool
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default y if (SMP || CPU_32v6) && (CPU_32v5 || CPU_32v4 || CPU_32v3)
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default y if SMP && (CPU_32v5 || CPU_32v4 || CPU_32v3)
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help
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We might be running on an ARMv6+ processor which should have the TLS
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register but for some reason we can't use it, or maybe an SMP system
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using a pre-ARMv6 processor (there are apparently a few prototypes
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like that in existence) and therefore access to that register must
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be emulated.
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An SMP system using a pre-ARMv6 processor (there are apparently
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a few prototypes like that in existence) and therefore access to
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that required register must be emulated.
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config HAS_TLS_REG
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bool
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depends on CPU_32v6
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default y if !TLS_REG_EMUL
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depends on !TLS_REG_EMUL
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default y if SMP || CPU_32v7
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help
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This selects support for the CP15 thread register.
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It is defined to be available on ARMv6 or later. If a particular
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ARMv6 or later CPU doesn't support it then it must omc;ide "select
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TLS_REG_EMUL" along with its other caracteristics.
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It is defined to be available on some ARMv6 processors (including
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all SMP capable ARMv6's) or later processors. User space may
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assume directly accessing that register and always obtain the
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expected value only on ARMv7 and above.
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|
|
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@ -1,80 +0,0 @@
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/*
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* linux/arch/arm/lib/copy_page-armv4mc.S
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*
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* Copyright (C) 1995-2001 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* ASM optimised string functions
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/constants.h>
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.text
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.align 5
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/*
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* ARMv4 mini-dcache optimised copy_user_page
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*
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* We flush the destination cache lines just before we write the data into the
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* corresponding address. Since the Dcache is read-allocate, this removes the
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* Dcache aliasing issue. The writes will be forwarded to the write buffer,
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* and merged as appropriate.
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*
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* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
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* instruction. If your processor does not supply this, you have to write your
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* own copy_user_page that does the right thing.
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*/
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ENTRY(v4_mc_copy_user_page)
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stmfd sp!, {r4, lr} @ 2
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mov r4, r0
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mov r0, r1
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bl map_page_minicache
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mov r1, #PAGE_SZ/64 @ 1
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ldmia r0!, {r2, r3, ip, lr} @ 4
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1: mcr p15, 0, r4, c7, c6, 1 @ 1 invalidate D line
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmia r0!, {r2, r3, ip, lr} @ 4+1
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmia r0!, {r2, r3, ip, lr} @ 4
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mcr p15, 0, r4, c7, c6, 1 @ 1 invalidate D line
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmia r0!, {r2, r3, ip, lr} @ 4
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subs r1, r1, #1 @ 1
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmneia r0!, {r2, r3, ip, lr} @ 4
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bne 1b @ 1
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ldmfd sp!, {r4, pc} @ 3
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.align 5
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/*
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* ARMv4 optimised clear_user_page
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*
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* Same story as above.
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*/
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ENTRY(v4_mc_clear_user_page)
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str lr, [sp, #-4]!
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mov r1, #PAGE_SZ/64 @ 1
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mov r2, #0 @ 1
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mov r3, #0 @ 1
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mov ip, #0 @ 1
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mov lr, #0 @ 1
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1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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subs r1, r1, #1 @ 1
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bne 1b @ 1
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ldr pc, [sp], #4
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__INITDATA
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.type v4_mc_user_fns, #object
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ENTRY(v4_mc_user_fns)
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.long v4_mc_clear_user_page
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.long v4_mc_copy_user_page
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.size v4_mc_user_fns, . - v4_mc_user_fns
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111
arch/arm/mm/copypage-v4mc.c
Normal file
111
arch/arm/mm/copypage-v4mc.c
Normal file
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@ -0,0 +1,111 @@
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/*
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* linux/arch/arm/lib/copypage-armv4mc.S
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*
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* Copyright (C) 1995-2005 Russell King
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||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
|
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* published by the Free Software Foundation.
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*
|
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* This handles the mini data cache, as found on SA11x0 and XScale
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* processors. When we copy a user page page, we map it in such a way
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* that accesses to this page will not touch the main data cache, but
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* will be cached in the mini data cache. This prevents us thrashing
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* the main data cache on page faults.
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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/*
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||||
* 0xffff8000 to 0xffffffff is reserved for any ARM architecture
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* specific hacks for copying pages efficiently.
|
||||
*/
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#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
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L_PTE_CACHEABLE)
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#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
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|
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static DEFINE_SPINLOCK(minicache_lock);
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||||
/*
|
||||
* ARMv4 mini-dcache optimised copy_user_page
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||||
*
|
||||
* We flush the destination cache lines just before we write the data into the
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* corresponding address. Since the Dcache is read-allocate, this removes the
|
||||
* Dcache aliasing issue. The writes will be forwarded to the write buffer,
|
||||
* and merged as appropriate.
|
||||
*
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||||
* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
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* instruction. If your processor does not supply this, you have to write your
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* own copy_user_page that does the right thing.
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*/
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static void __attribute__((naked))
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mc_copy_user_page(void *from, void *to)
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{
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asm volatile(
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"stmfd sp!, {r4, lr} @ 2\n\
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mov r4, %2 @ 1\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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1: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4+1\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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subs r4, r4, #1 @ 1\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmneia %0!, {r2, r3, ip, lr} @ 4\n\
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bne 1b @ 1\n\
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ldmfd sp!, {r4, pc} @ 3"
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:
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: "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
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}
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void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
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{
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spin_lock(&minicache_lock);
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set_pte(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot));
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flush_tlb_kernel_page(0xffff8000);
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|
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mc_copy_user_page((void *)0xffff8000, kto);
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|
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spin_unlock(&minicache_lock);
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}
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|
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/*
|
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* ARMv4 optimised clear_user_page
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*/
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void __attribute__((naked))
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v4_mc_clear_user_page(void *kaddr, unsigned long vaddr)
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{
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asm volatile(
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"str lr, [sp, #-4]!\n\
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mov r1, %0 @ 1\n\
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mov r2, #0 @ 1\n\
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mov r3, #0 @ 1\n\
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mov ip, #0 @ 1\n\
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mov lr, #0 @ 1\n\
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1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
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mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
subs r1, r1, #1 @ 1\n\
|
||||
bne 1b @ 1\n\
|
||||
ldr pc, [sp], #4"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
struct cpu_user_fns v4_mc_user_fns __initdata = {
|
||||
.cpu_clear_user_page = v4_mc_clear_user_page,
|
||||
.cpu_copy_user_page = v4_mc_copy_user_page,
|
||||
};
|
||||
|
|
@ -26,8 +26,8 @@
|
|||
#define to_address (0xffffc000)
|
||||
#define to_pgprot PAGE_KERNEL
|
||||
|
||||
static pte_t *from_pte;
|
||||
static pte_t *to_pte;
|
||||
#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
|
||||
|
||||
static DEFINE_SPINLOCK(v6_lock);
|
||||
|
||||
#define DCACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
|
||||
|
|
@ -74,8 +74,8 @@ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vadd
|
|||
*/
|
||||
spin_lock(&v6_lock);
|
||||
|
||||
set_pte(from_pte + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, from_pgprot));
|
||||
set_pte(to_pte + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, to_pgprot));
|
||||
set_pte(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, from_pgprot));
|
||||
set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, to_pgprot));
|
||||
|
||||
from = from_address + (offset << PAGE_SHIFT);
|
||||
to = to_address + (offset << PAGE_SHIFT);
|
||||
|
|
@ -114,7 +114,7 @@ void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
|
|||
*/
|
||||
spin_lock(&v6_lock);
|
||||
|
||||
set_pte(to_pte + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, to_pgprot));
|
||||
set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, to_pgprot));
|
||||
flush_tlb_kernel_page(to);
|
||||
clear_page((void *)to);
|
||||
|
||||
|
|
@ -129,21 +129,6 @@ struct cpu_user_fns v6_user_fns __initdata = {
|
|||
static int __init v6_userpage_init(void)
|
||||
{
|
||||
if (cache_is_vipt_aliasing()) {
|
||||
pgd_t *pgd;
|
||||
pmd_t *pmd;
|
||||
|
||||
pgd = pgd_offset_k(from_address);
|
||||
pmd = pmd_alloc(&init_mm, pgd, from_address);
|
||||
if (!pmd)
|
||||
BUG();
|
||||
from_pte = pte_alloc_kernel(&init_mm, pmd, from_address);
|
||||
if (!from_pte)
|
||||
BUG();
|
||||
|
||||
to_pte = pte_alloc_kernel(&init_mm, pmd, to_address);
|
||||
if (!to_pte)
|
||||
BUG();
|
||||
|
||||
cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing;
|
||||
cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing;
|
||||
}
|
||||
|
|
@ -151,5 +136,4 @@ static int __init v6_userpage_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
__initcall(v6_userpage_init);
|
||||
|
||||
core_initcall(v6_userpage_init);
|
||||
|
|
|
|||
|
|
@ -13,6 +13,29 @@
|
|||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
||||
#ifdef CONFIG_CPU_CACHE_VIPT
|
||||
#define ALIAS_FLUSH_START 0xffff4000
|
||||
|
||||
#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
|
||||
|
||||
static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
|
||||
{
|
||||
unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
|
||||
|
||||
set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
|
||||
flush_tlb_kernel_page(to);
|
||||
|
||||
asm( "mcrr p15, 0, %1, %0, c14\n"
|
||||
" mcrr p15, 0, %1, %0, c5\n"
|
||||
:
|
||||
: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES)
|
||||
: "cc");
|
||||
}
|
||||
#else
|
||||
#define flush_pfn_alias(pfn,vaddr) do { } while (0)
|
||||
#endif
|
||||
|
||||
static void __flush_dcache_page(struct address_space *mapping, struct page *page)
|
||||
{
|
||||
|
|
@ -36,6 +59,18 @@ static void __flush_dcache_page(struct address_space *mapping, struct page *page
|
|||
if (!mapping)
|
||||
return;
|
||||
|
||||
/*
|
||||
* This is a page cache page. If we have a VIPT cache, we
|
||||
* only need to do one flush - which would be at the relevant
|
||||
* userspace colour, which is congruent with page->index.
|
||||
*/
|
||||
if (cache_is_vipt()) {
|
||||
if (cache_is_vipt_aliasing())
|
||||
flush_pfn_alias(page_to_pfn(page),
|
||||
page->index << PAGE_CACHE_SHIFT);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* There are possible user space mappings of this page:
|
||||
* - VIVT cache: we need to also write back and invalidate all user
|
||||
|
|
@ -57,8 +92,6 @@ static void __flush_dcache_page(struct address_space *mapping, struct page *page
|
|||
continue;
|
||||
offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
|
||||
flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
|
||||
if (cache_is_vipt())
|
||||
break;
|
||||
}
|
||||
flush_dcache_mmap_unlock(mapping);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,6 +37,8 @@ pgprot_t pgprot_kernel;
|
|||
|
||||
EXPORT_SYMBOL(pgprot_kernel);
|
||||
|
||||
pmd_t *top_pmd;
|
||||
|
||||
struct cachepolicy {
|
||||
const char policy[16];
|
||||
unsigned int cr_mask;
|
||||
|
|
@ -142,6 +144,16 @@ __setup("noalign", noalign_setup);
|
|||
|
||||
#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
|
||||
|
||||
static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
|
||||
{
|
||||
return pmd_offset(pgd, virt);
|
||||
}
|
||||
|
||||
static inline pmd_t *pmd_off_k(unsigned long virt)
|
||||
{
|
||||
return pmd_off(pgd_offset_k(virt), virt);
|
||||
}
|
||||
|
||||
/*
|
||||
* need to get a 16k page for level 1
|
||||
*/
|
||||
|
|
@ -220,7 +232,7 @@ void free_pgd_slow(pgd_t *pgd)
|
|||
return;
|
||||
|
||||
/* pgd is always present and good */
|
||||
pmd = (pmd_t *)pgd;
|
||||
pmd = pmd_off(pgd, 0);
|
||||
if (pmd_none(*pmd))
|
||||
goto free;
|
||||
if (pmd_bad(*pmd)) {
|
||||
|
|
@ -246,9 +258,8 @@ void free_pgd_slow(pgd_t *pgd)
|
|||
static inline void
|
||||
alloc_init_section(unsigned long virt, unsigned long phys, int prot)
|
||||
{
|
||||
pmd_t *pmdp;
|
||||
pmd_t *pmdp = pmd_off_k(virt);
|
||||
|
||||
pmdp = pmd_offset(pgd_offset_k(virt), virt);
|
||||
if (virt & (1 << 20))
|
||||
pmdp++;
|
||||
|
||||
|
|
@ -283,11 +294,9 @@ alloc_init_supersection(unsigned long virt, unsigned long phys, int prot)
|
|||
static inline void
|
||||
alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pgprot_t prot)
|
||||
{
|
||||
pmd_t *pmdp;
|
||||
pmd_t *pmdp = pmd_off_k(virt);
|
||||
pte_t *ptep;
|
||||
|
||||
pmdp = pmd_offset(pgd_offset_k(virt), virt);
|
||||
|
||||
if (pmd_none(*pmdp)) {
|
||||
unsigned long pmdval;
|
||||
ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE *
|
||||
|
|
@ -310,7 +319,7 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
|
|||
*/
|
||||
static inline void clear_mapping(unsigned long virt)
|
||||
{
|
||||
pmd_clear(pmd_offset(pgd_offset_k(virt), virt));
|
||||
pmd_clear(pmd_off_k(virt));
|
||||
}
|
||||
|
||||
struct mem_types {
|
||||
|
|
@ -578,7 +587,7 @@ void setup_mm_for_reboot(char mode)
|
|||
PMD_TYPE_SECT;
|
||||
if (cpu_arch <= CPU_ARCH_ARMv5)
|
||||
pmdval |= PMD_BIT4;
|
||||
pmd = pmd_offset(pgd + i, i << PGDIR_SHIFT);
|
||||
pmd = pmd_off(pgd, i << PGDIR_SHIFT);
|
||||
pmd[0] = __pmd(pmdval);
|
||||
pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
|
||||
flush_pmd_entry(pmd);
|
||||
|
|
@ -675,6 +684,8 @@ void __init memtable_init(struct meminfo *mi)
|
|||
|
||||
flush_cache_all();
|
||||
flush_tlb_all();
|
||||
|
||||
top_pmd = pmd_off_k(0xffff0000);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -237,3 +237,5 @@ long compat_blkdev_ioctl(struct file *file, unsigned cmd, unsigned long arg)
|
|||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(blkdev_ioctl);
|
||||
|
|
|
|||
|
|
@ -2406,7 +2406,7 @@ static int pkt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, u
|
|||
case CDROM_LAST_WRITTEN:
|
||||
case CDROM_SEND_PACKET:
|
||||
case SCSI_IOCTL_SEND_COMMAND:
|
||||
return ioctl_by_bdev(pd->bdev, cmd, arg);
|
||||
return blkdev_ioctl(pd->bdev->bd_inode, file, cmd, arg);
|
||||
|
||||
case CDROMEJECT:
|
||||
/*
|
||||
|
|
@ -2414,7 +2414,7 @@ static int pkt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, u
|
|||
* have to unlock it or else the eject command fails.
|
||||
*/
|
||||
pkt_lock_door(pd, 0);
|
||||
return ioctl_by_bdev(pd->bdev, cmd, arg);
|
||||
return blkdev_ioctl(pd->bdev->bd_inode, file, cmd, arg);
|
||||
|
||||
default:
|
||||
printk("pktcdvd: Unknown ioctl for %s (%x)\n", pd->name, cmd);
|
||||
|
|
|
|||
|
|
@ -122,7 +122,7 @@ raw_ioctl(struct inode *inode, struct file *filp,
|
|||
{
|
||||
struct block_device *bdev = filp->private_data;
|
||||
|
||||
return ioctl_by_bdev(bdev, command, arg);
|
||||
return blkdev_ioctl(bdev->bd_inode, filp, command, arg);
|
||||
}
|
||||
|
||||
static void bind_device(struct raw_config_request *rq)
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ config MMC_PXA
|
|||
|
||||
config MMC_WBSD
|
||||
tristate "Winbond W83L51xD SD/MMC Card Interface support"
|
||||
depends on MMC && ISA && ISA_DMA_API
|
||||
depends on MMC && ISA_DMA_API
|
||||
help
|
||||
This selects the Winbond(R) W83L51xD Secure digital and
|
||||
Multimedia card Interface.
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -35,6 +35,12 @@ const int valid_ids[] = {
|
|||
|
||||
#define DEVICE_SD 0x03
|
||||
|
||||
#define WBSD_PINS_DAT3_HI 0x20
|
||||
#define WBSD_PINS_DAT3_OUT 0x10
|
||||
#define WBSD_PINS_GP11_HI 0x04
|
||||
#define WBSD_PINS_DETECT_GP11 0x02
|
||||
#define WBSD_PINS_DETECT_DAT3 0x01
|
||||
|
||||
#define WBSD_CMDR 0x00
|
||||
#define WBSD_DFR 0x01
|
||||
#define WBSD_EIR 0x02
|
||||
|
|
@ -133,6 +139,7 @@ const int valid_ids[] = {
|
|||
#define WBSD_CRC_OK 0x05 /* S010E (00101) */
|
||||
#define WBSD_CRC_FAIL 0x0B /* S101E (01011) */
|
||||
|
||||
#define WBSD_DMA_SIZE 65536
|
||||
|
||||
struct wbsd_host
|
||||
{
|
||||
|
|
@ -140,6 +147,11 @@ struct wbsd_host
|
|||
|
||||
spinlock_t lock; /* Mutex */
|
||||
|
||||
int flags; /* Driver states */
|
||||
|
||||
#define WBSD_FCARD_PRESENT (1<<0) /* Card is present */
|
||||
#define WBSD_FIGNORE_DETECT (1<<1) /* Ignore card detection */
|
||||
|
||||
struct mmc_request* mrq; /* Current request */
|
||||
|
||||
u8 isr; /* Accumulated ISR */
|
||||
|
|
|
|||
|
|
@ -187,7 +187,7 @@ obj-$(CONFIG_TR) += tokenring/
|
|||
obj-$(CONFIG_WAN) += wan/
|
||||
obj-$(CONFIG_ARCNET) += arcnet/
|
||||
obj-$(CONFIG_NET_PCMCIA) += pcmcia/
|
||||
obj-$(CONFIG_NET_WIRELESS) += wireless/
|
||||
obj-$(CONFIG_NET_RADIO) += wireless/
|
||||
obj-$(CONFIG_NET_TULIP) += tulip/
|
||||
obj-$(CONFIG_HAMRADIO) += hamradio/
|
||||
obj-$(CONFIG_IRDA) += irda/
|
||||
|
|
|
|||
|
|
@ -1595,7 +1595,7 @@ static struct ethtool_ops emac_ethtool_ops = {
|
|||
static int emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
||||
{
|
||||
struct ocp_enet_private *fep = dev->priv;
|
||||
uint *data = (uint *) & rq->ifr_ifru;
|
||||
uint16_t *data = (uint16_t *) & rq->ifr_ifru;
|
||||
|
||||
switch (cmd) {
|
||||
case SIOCGMIIPHY:
|
||||
|
|
|
|||
|
|
@ -1104,7 +1104,7 @@ static void set_rx_mode(struct net_device *dev)
|
|||
if (entry != 0) {
|
||||
/* Avoid a chip errata by prefixing a dummy entry. Don't do
|
||||
this on the ULI526X as it triggers a different problem */
|
||||
if (!(tp->chip_id == ULI526X && (tp->revision = 0x40 || tp->revision == 0x50))) {
|
||||
if (!(tp->chip_id == ULI526X && (tp->revision == 0x40 || tp->revision == 0x50))) {
|
||||
tp->tx_buffers[entry].skb = NULL;
|
||||
tp->tx_buffers[entry].mapping = 0;
|
||||
tp->tx_ring[entry].length =
|
||||
|
|
|
|||
|
|
@ -323,7 +323,7 @@ config PRISM54
|
|||
For a complete list of supported cards visit <http://prism54.org>.
|
||||
Here is the latest confirmed list of supported cards:
|
||||
|
||||
3com OfficeConnect 11g Cardbus Card aka 3CRWE154G72
|
||||
3com OfficeConnect 11g Cardbus Card aka 3CRWE154G72 (version 1)
|
||||
Allnet ALL0271 PCI Card
|
||||
Compex WL54G Cardbus Card
|
||||
Corega CG-WLCB54GT Cardbus Card
|
||||
|
|
|
|||
|
|
@ -126,18 +126,8 @@ static irqreturn_t serial21285_rx_chars(int irq, void *dev_id, struct pt_regs *r
|
|||
flag = TTY_FRAME;
|
||||
}
|
||||
|
||||
if ((rxs & port->ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
if ((rxs & RXSTAT_OVERRUN) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character.
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
|
||||
|
||||
status = *CSR_UARTFLG;
|
||||
}
|
||||
tty_flip_buffer_push(tty);
|
||||
|
|
|
|||
|
|
@ -1122,18 +1122,9 @@ receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
|
|||
}
|
||||
if (uart_handle_sysrq_char(&up->port, ch, regs))
|
||||
goto ignore_char;
|
||||
if ((lsr & up->port.ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
if ((lsr & UART_LSR_OE) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character.
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
|
||||
uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
lsr = serial_inp(up, UART_LSR);
|
||||
} while ((lsr & UART_LSR_DR) && (max_count-- > 0));
|
||||
|
|
|
|||
|
|
@ -198,18 +198,8 @@ pl010_rx_chars(struct uart_port *port)
|
|||
if (uart_handle_sysrq_char(port, ch, regs))
|
||||
goto ignore_char;
|
||||
|
||||
if ((rsr & port->ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
if ((rsr & UART01x_RSR_OE) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
status = UART_GET_FR(port);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -163,18 +163,8 @@ pl011_rx_chars(struct uart_amba_port *uap)
|
|||
if (uart_handle_sysrq_char(&uap->port, ch, regs))
|
||||
goto ignore_char;
|
||||
|
||||
if ((rsr & uap->port.ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
if ((rsr & UART01x_RSR_OE) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
status = readw(uap->port.membase + UART01x_FR);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -143,10 +143,7 @@ static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id, struct pt_regs *re
|
|||
* CHECK: does overrun affect the current character?
|
||||
* ASSUMPTION: it does not.
|
||||
*/
|
||||
if ((ch & port->ignore_status_mask & ~RXSTAT_OVERRUN) == 0)
|
||||
tty_insert_flip_char(tty, ch, flg);
|
||||
if ((ch & ~port->ignore_status_mask & RXSTAT_OVERRUN) == 0)
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
|
||||
|
||||
ignore_char:
|
||||
status = clps_readl(SYSFLG(port));
|
||||
|
|
|
|||
|
|
@ -161,20 +161,12 @@ receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
|
|||
else if (*status & UART_LSR_FE)
|
||||
flag = TTY_FRAME;
|
||||
}
|
||||
|
||||
if (uart_handle_sysrq_char(&up->port, ch, regs))
|
||||
goto ignore_char;
|
||||
if ((*status & up->port.ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
if ((*status & UART_LSR_OE) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character.
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
|
||||
uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
*status = serial_in(up, UART_LSR);
|
||||
} while ((*status & UART_LSR_DR) && (max_count-- > 0));
|
||||
|
|
|
|||
|
|
@ -394,20 +394,7 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id, struct pt_regs *regs)
|
|||
if (uart_handle_sysrq_char(port, ch, regs))
|
||||
goto ignore_char;
|
||||
|
||||
if ((uerstat & port->ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
|
||||
if ((uerstat & S3C2410_UERSTAT_OVERRUN) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character.
|
||||
*/
|
||||
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
continue;
|
||||
|
|
|
|||
|
|
@ -237,10 +237,7 @@ sa1100_rx_chars(struct sa1100_port *sport, struct pt_regs *regs)
|
|||
if (uart_handle_sysrq_char(&sport->port, ch, regs))
|
||||
goto ignore_char;
|
||||
|
||||
if ((status & port->ignore_status_mask & ~UTSR1_TO_SM(UTSR1_ROR)) == 0)
|
||||
tty_insert_flip_char(tty, ch, flg);
|
||||
if (status & ~port->ignore_status_mask & UTSR1_TO_SM(UTSR1_ROR))
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
|
||||
|
||||
ignore_char:
|
||||
status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
|
||||
|
|
|
|||
|
|
@ -190,18 +190,7 @@ lh7a40xuart_rx_chars (struct uart_port* port)
|
|||
if (uart_handle_sysrq_char (port, (unsigned char) data, regs))
|
||||
continue;
|
||||
|
||||
if ((data & port->ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, data, flag);
|
||||
}
|
||||
if ((data & RxOverrunError)
|
||||
&& tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
uart_insert_char(port, data, RxOverrunError, data, flag);
|
||||
}
|
||||
tty_flip_buffer_push (tty);
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -350,18 +350,9 @@ receive_chars(struct uart_txx9_port *up, unsigned int *status, struct pt_regs *r
|
|||
}
|
||||
if (uart_handle_sysrq_char(&up->port, ch, regs))
|
||||
goto ignore_char;
|
||||
if ((disr & up->port.ignore_status_mask) == 0) {
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
}
|
||||
if ((disr & TXX9_SIDISR_UOER) &&
|
||||
tty->flip.count < TTY_FLIPBUF_SIZE) {
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character.
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
|
||||
uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
disr = sio_in(up, TXX9_SIDISR);
|
||||
} while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
|
||||
|
|
|
|||
|
|
@ -412,10 +412,8 @@ static inline void receive_chars(struct uart_port *port, uint8_t *status,
|
|||
|
||||
if (uart_handle_sysrq_char(port, ch, regs))
|
||||
goto ignore_char;
|
||||
if ((lsr & port->ignore_status_mask) == 0)
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
if ((lsr & UART_LSR_OE) && (tty->flip.count < TTY_FLIPBUF_SIZE))
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
|
||||
uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
lsr = siu_read(port, UART_LSR);
|
||||
|
|
|
|||
|
|
@ -251,7 +251,7 @@ create_elf_tables(struct linux_binprm *bprm, struct elfhdr * exec,
|
|||
}
|
||||
|
||||
/* Populate argv and envp */
|
||||
p = current->mm->arg_start;
|
||||
p = current->mm->arg_end = current->mm->arg_start;
|
||||
while (argc-- > 0) {
|
||||
size_t len;
|
||||
__put_user((elf_addr_t)p, argv++);
|
||||
|
|
@ -1301,7 +1301,7 @@ static void fill_prstatus(struct elf_prstatus *prstatus,
|
|||
static int fill_psinfo(struct elf_prpsinfo *psinfo, struct task_struct *p,
|
||||
struct mm_struct *mm)
|
||||
{
|
||||
int i, len;
|
||||
unsigned int i, len;
|
||||
|
||||
/* first copy the parameters from user space */
|
||||
memset(psinfo, 0, sizeof(struct elf_prpsinfo));
|
||||
|
|
|
|||
|
|
@ -227,6 +227,30 @@
|
|||
#define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 )
|
||||
#define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 )
|
||||
|
||||
/*
|
||||
* PWM controller
|
||||
*/
|
||||
#define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */
|
||||
#define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */
|
||||
#define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */
|
||||
#define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */
|
||||
|
||||
#define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */
|
||||
#define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */
|
||||
#define PWMC_SWR (0x01<<16) /* Software Reset */
|
||||
#define PWMC_CLKSRC (0x01<<15) /* Clock Source */
|
||||
#define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */
|
||||
#define PWMC_IRQ (0x01<< 7) /* Interrupt Request */
|
||||
#define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */
|
||||
#define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */
|
||||
#define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */
|
||||
#define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */
|
||||
#define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */
|
||||
|
||||
#define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */
|
||||
#define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */
|
||||
#define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */
|
||||
|
||||
/*
|
||||
* DMA Controller
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -1,16 +1,17 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/regs-nand.h
|
||||
*
|
||||
* Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
|
||||
* Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk>
|
||||
* http://www.simtec.co.uk/products/SWLINUX/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* S3C2410 clock register definitions
|
||||
* S3C2410 NAND register definitions
|
||||
*
|
||||
* Changelog:
|
||||
* 18-Aug-2004 BJD Copied file from 2.4 and updated
|
||||
* 01-May-2005 BJD Added definitions for s3c2440 controller
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARM_REGS_NAND
|
||||
|
|
@ -26,6 +27,22 @@
|
|||
#define S3C2410_NFSTAT S3C2410_NFREG(0x10)
|
||||
#define S3C2410_NFECC S3C2410_NFREG(0x14)
|
||||
|
||||
#define S3C2440_NFCONT S3C2410_NFREG(0x04)
|
||||
#define S3C2440_NFCMD S3C2410_NFREG(0x08)
|
||||
#define S3C2440_NFADDR S3C2410_NFREG(0x0C)
|
||||
#define S3C2440_NFDATA S3C2410_NFREG(0x10)
|
||||
#define S3C2440_NFECCD0 S3C2410_NFREG(0x14)
|
||||
#define S3C2440_NFECCD1 S3C2410_NFREG(0x18)
|
||||
#define S3C2440_NFECCD S3C2410_NFREG(0x1C)
|
||||
#define S3C2440_NFSTAT S3C2410_NFREG(0x20)
|
||||
#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
|
||||
#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
|
||||
#define S3C2440_NFMECC0 S3C2410_NFREG(0x2C)
|
||||
#define S3C2440_NFMECC1 S3C2410_NFREG(0x30)
|
||||
#define S3C2440_NFSECC S3C2410_NFREG(0x34)
|
||||
#define S3C2440_NFSBLK S3C2410_NFREG(0x38)
|
||||
#define S3C2440_NFEBLK S3C2410_NFREG(0x3C)
|
||||
|
||||
#define S3C2410_NFCONF_EN (1<<15)
|
||||
#define S3C2410_NFCONF_512BYTE (1<<14)
|
||||
#define S3C2410_NFCONF_4STEP (1<<13)
|
||||
|
|
@ -37,7 +54,28 @@
|
|||
|
||||
#define S3C2410_NFSTAT_BUSY (1<<0)
|
||||
|
||||
/* think ECC can only be 8bit read? */
|
||||
#define S3C2440_NFCONF_BUSWIDTH_8 (0<<0)
|
||||
#define S3C2440_NFCONF_BUSWIDTH_16 (1<<0)
|
||||
#define S3C2440_NFCONF_ADVFLASH (1<<3)
|
||||
#define S3C2440_NFCONF_TACLS(x) ((x)<<12)
|
||||
#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)
|
||||
#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)
|
||||
|
||||
#define S3C2440_NFCONT_LOCKTIGHT (1<<13)
|
||||
#define S3C2440_NFCONT_SOFTLOCK (1<<12)
|
||||
#define S3C2440_NFCONT_ILLEGALACC_EN (1<<10)
|
||||
#define S3C2440_NFCONT_RNBINT_EN (1<<9)
|
||||
#define S3C2440_NFCONT_RN_FALLING (1<<8)
|
||||
#define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6)
|
||||
#define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5)
|
||||
#define S3C2440_NFCONT_INITECC (1<<4)
|
||||
#define S3C2440_NFCONT_nFCE (1<<1)
|
||||
#define S3C2440_NFCONT_ENABLE (1<<0)
|
||||
|
||||
#define S3C2440_NFSTAT_READY (1<<0)
|
||||
#define S3C2440_NFSTAT_nCE (1<<1)
|
||||
#define S3C2440_NFSTAT_RnB_CHANGE (1<<2)
|
||||
#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3)
|
||||
|
||||
#endif /* __ASM_ARM_REGS_NAND */
|
||||
|
||||
|
|
|
|||
|
|
@ -114,19 +114,8 @@ extern void __cpu_copy_user_page(void *to, const void *from,
|
|||
unsigned long user);
|
||||
#endif
|
||||
|
||||
#define clear_user_page(addr,vaddr,pg) \
|
||||
do { \
|
||||
preempt_disable(); \
|
||||
__cpu_clear_user_page(addr, vaddr); \
|
||||
preempt_enable(); \
|
||||
} while (0)
|
||||
|
||||
#define copy_user_page(to,from,vaddr,pg) \
|
||||
do { \
|
||||
preempt_disable(); \
|
||||
__cpu_copy_user_page(to, from, vaddr); \
|
||||
preempt_enable(); \
|
||||
} while (0)
|
||||
#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr)
|
||||
#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
|
||||
|
||||
#define clear_page(page) memzero((void *)(page), PAGE_SIZE)
|
||||
extern void copy_page(void *to, const void *from);
|
||||
|
|
@ -171,6 +160,9 @@ typedef unsigned long pgprot_t;
|
|||
|
||||
#endif /* STRICT_MM_TYPECHECKS */
|
||||
|
||||
/* the upper-most page table pointer */
|
||||
extern pmd_t *top_pmd;
|
||||
|
||||
/* Pure 2^n version of get_order */
|
||||
static inline int get_order(unsigned long size)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -479,6 +479,25 @@ uart_handle_cts_change(struct uart_port *port, unsigned int status)
|
|||
}
|
||||
}
|
||||
|
||||
#include <linux/tty_flip.h>
|
||||
|
||||
static inline void
|
||||
uart_insert_char(struct uart_port *port, unsigned int status,
|
||||
unsigned int overrun, unsigned int ch, unsigned int flag)
|
||||
{
|
||||
struct tty_struct *tty = port->info->tty;
|
||||
|
||||
if ((status & port->ignore_status_mask & ~overrun) == 0)
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
|
||||
/*
|
||||
* Overrun is special. Since it's reported immediately,
|
||||
* it doesn't affect the current character.
|
||||
*/
|
||||
if (status & ~port->ignore_status_mask & overrun)
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
|
||||
/*
|
||||
* UART_ENABLE_MS - determine if port should enable modem status irqs
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in a new issue