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ASoC: rt5645: fix issue of random interrupt from push-button

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Modify register setting sequence of enabling inline command
to fix issue of random interrupt from push-button.

Signed-off-by: Jack Yu <jack.yu@realtek.com>
Link: https://patch.msgid.link/9a7a3a66cbcb426487ca6f558f45e922@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jack Yu 2024-06-26 08:25:34 +00:00 committed by Mark Brown
parent 63b47f026c
commit 68f97fe330
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
2 changed files with 24 additions and 6 deletions
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24
sound/soc/codecs/rt5645.c
View file

@ -81,7 +81,7 @@ static const struct reg_sequence init_list[] = {
static const struct reg_sequence rt5650_init_list[] = {
{0xf6, 0x0100},
{RT5645_PWR_ANLG1, 0x02},
{RT5645_IL_CMD3, 0x0018},
{RT5645_IL_CMD3, 0x6728},
};
static const struct reg_default rt5645_reg[] = {
@ -3130,20 +3130,32 @@ static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
bool enable)
{
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
int ret;
if (enable) {
snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
snd_soc_dapm_sync(dapm);
snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2,
RT5645_EN_4BTN_IL_MASK | RT5645_RST_4BTN_IL_MASK,
RT5645_EN_4BTN_IL_EN | RT5645_RST_4BTN_IL_RST);
usleep_range(10000, 15000);
snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2,
RT5645_EN_4BTN_IL_MASK | RT5645_RST_4BTN_IL_MASK,
RT5645_EN_4BTN_IL_EN | RT5645_RST_4BTN_IL_NORM);
msleep(50);
ret = snd_soc_component_read(component, RT5645_INT_IRQ_ST);
pr_debug("%s read %x = %x\n", __func__, RT5645_INT_IRQ_ST,
snd_soc_component_read(component, RT5645_INT_IRQ_ST));
snd_soc_component_write(component, RT5645_INT_IRQ_ST, ret);
ret = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, ret);
snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
snd_soc_component_update_bits(component,
RT5645_INT_IRQ_ST, 0x8, 0x8);
snd_soc_component_update_bits(component,
RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
} else {
snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);

6
sound/soc/codecs/rt5645.h
View file

@ -2011,6 +2011,12 @@
#define RT5645_ZCD_HP_DIS (0x0 << 15)
#define RT5645_ZCD_HP_EN (0x1 << 15)
/* Buttons Inline Command Function 2 (0xe0) */
#define RT5645_EN_4BTN_IL_MASK (0x1 << 15)
#define RT5645_EN_4BTN_IL_EN (0x1 << 15)
#define RT5645_RST_4BTN_IL_MASK (0x1 << 14)
#define RT5645_RST_4BTN_IL_RST (0x0 << 14)
#define RT5645_RST_4BTN_IL_NORM (0x1 << 14)
/* Codec Private Register definition */
/* DAC ADC Digital Volume (0x00) */