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uprobes/x86: Fix 1-byte opcode tables
This change fixes 1-byte opcode tables so that only insns for which we have real reasons to disallow probing are marked with unset bits. To that end: Set bits for all prefix bytes. Their setting is ignored anyway - we check the bitmap against OPCODE1(insn), not against first byte. Keeping them set to 0 only confuses code reader with "why we don't support that opcode" question. Thus: enable bytes c4,c5 in 64-bit mode (VEX prefixes). Byte 62 (EVEX prefix) is not yet enabled since insn decoder does not support that yet. For 32-bit mode, enable probing of opcodes 63 (arpl) and d6 (salc). They don't require any special handling. For 64-bit mode, disable 9a and ea - these undefined opcodes were mistakenly left enabled. Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Link: http://lkml.kernel.org/r/1423768732-32194-2-git-send-email-dvlasenk@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Denys Vlasenko
Ingo Molnar
parent
097f4e5e83
commit
67fc809217
1 changed files with 18 additions and 48 deletions
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@ -67,18 +67,6 @@
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* to keep gcc from statically optimizing it out, as variable_test_bit makes
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* some versions of gcc to think only *(unsigned long*) is used.
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*
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* Prefixes. Most marked as "bad", but it doesn't matter, since insn decoder
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* won't report *prefixes* as OPCODE1(insn).
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* 0f - 2-byte opcode prefix
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* 26,2e,36,3e - es:/cs:/ss:/ds:
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* 64 - fs: (marked as "good", why?)
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* 65 - gs: (marked as "good", why?)
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* 66 - operand-size prefix
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* 67 - address-size prefix
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* f0 - lock prefix
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* f2 - repnz (marked as "good", why?)
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* f3 - rep/repz (marked as "good", why?)
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*
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* Opcodes we'll probably never support:
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* 6c-6f - ins,outs. SEGVs if used in userspace
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* e4-e7 - in,out imm. SEGVs if used in userspace
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@ -105,31 +93,27 @@
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* Not supported since kernel's handling of userspace single-stepping
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* (TF flag) is fragile.
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* cf - iret. Normally not used in userspace. Doesn't SEGV unless arguments are bad
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*
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* Opcodes which can be enabled right away:
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* 63 - arpl. This insn has no unusual exceptions (it's basically an arith op).
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* d6 - salc. Undocumented "sign-extend carry flag to AL" insn
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*/
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#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
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static volatile u32 good_insns_32[256 / 32] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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/* ---------------------------------------------- */
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W(0x00, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) | /* 00 */
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W(0x00, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1) | /* 00 */
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W(0x10, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) , /* 10 */
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W(0x20, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1) | /* 20 */
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W(0x30, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1) , /* 30 */
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W(0x20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 20 */
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W(0x30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 30 */
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W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */
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W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */
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W(0x60, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */
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W(0x60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */
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W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */
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W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */
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W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */
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W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */
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W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */
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W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */
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W(0xd0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */
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W(0xd0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */
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W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */
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W(0xf0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */
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W(0xf0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */
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/* ---------------------------------------------- */
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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};
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@ -138,19 +122,6 @@ static volatile u32 good_insns_32[256 / 32] = {
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#endif
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/* Good-instruction tables for 64-bit apps.
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*
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* Prefixes. Most marked as "bad", but it doesn't matter, since insn decoder
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* won't report *prefixes* as OPCODE1(insn).
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* 0f - 2-byte opcode prefix
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* 26,2e,36,3e - es:/cs:/ss:/ds:
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* 40-4f - rex prefixes
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* 64 - fs: (marked as "good", why?)
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* 65 - gs: (marked as "good", why?)
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* 66 - operand-size prefix
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* 67 - address-size prefix
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* f0 - lock prefix
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* f2 - repnz (marked as "good", why?)
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* f3 - rep/repz (marked as "good", why?)
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*
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* Genuinely invalid opcodes:
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* 06,07 - formerly push/pop es
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@ -159,14 +130,13 @@ static volatile u32 good_insns_32[256 / 32] = {
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* 1e,1f - formerly push/pop ds
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* 27,2f,37,3f - formerly daa/das/aaa/aas
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* 60,61 - formerly pusha/popa
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* 62 - formerly bound. EVEX prefix for AVX512
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* 62 - formerly bound. EVEX prefix for AVX512 (not yet supported)
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* 82 - formerly redundant encoding of Group1
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* 9a - formerly call seg:ofs (marked as "supported"???)
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* c4,c5 - formerly les/lds. VEX prefixes for AVX
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* 9a - formerly call seg:ofs
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* ce - formerly into
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* d4,d5 - formerly aam/aad
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* d6 - formerly undocumented salc
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* ea - formerly jmp seg:ofs (marked as "supported"???)
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* ea - formerly jmp seg:ofs
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*
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* Opcodes we'll probably never support:
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* 6c-6f - ins,outs. SEGVs if used in userspace
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@ -190,22 +160,22 @@ static volatile u32 good_insns_32[256 / 32] = {
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static volatile u32 good_insns_64[256 / 32] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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/* ---------------------------------------------- */
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W(0x00, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) | /* 00 */
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W(0x00, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1) | /* 00 */
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W(0x10, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 10 */
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W(0x20, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) | /* 20 */
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W(0x30, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 30 */
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W(0x40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) | /* 40 */
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W(0x20, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) | /* 20 */
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W(0x30, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) , /* 30 */
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W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */
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W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */
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W(0x60, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */
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W(0x60, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */
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W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */
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W(0x80, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */
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W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */
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W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1) , /* 90 */
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W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */
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W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */
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W(0xc0, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */
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W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */
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W(0xd0, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */
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W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */
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W(0xf0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */
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W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0) | /* e0 */
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W(0xf0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */
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/* ---------------------------------------------- */
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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};
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