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drm/tegra: gem: Fix CPU-cache maintenance for BO's allocated using get_pages()
The allocated pages need to be invalidated in CPU caches. On ARM32 the
DMA_BIDIRECTIONAL flag only ensures that data is written-back to DRAM and
the data stays in CPU cache lines. While the DMA_FROM_DEVICE flag ensures
that the corresponding CPU cache lines are getting invalidated and nothing
more, that's exactly what is needed for a newly allocated pages.
This fixes randomly failing rendercheck tests on Tegra30 using the
Opentegra driver for tests that use small-sized pixmaps (10x10 and less,
i.e. 1-2 memory pages) because apparently CPU reads out stale data from
caches and/or that data is getting evicted to DRAM at the time of HW job
execution.
Fixes: bd43c9f0fa
("drm/tegra: gem: Map pages via the DMA API")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
parent
11c632e1cf
commit
61b51fb51c
1 changed files with 2 additions and 2 deletions
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@ -204,7 +204,7 @@ static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo)
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{
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if (bo->pages) {
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dma_unmap_sg(drm->dev, bo->sgt->sgl, bo->sgt->nents,
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DMA_BIDIRECTIONAL);
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DMA_FROM_DEVICE);
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drm_gem_put_pages(&bo->gem, bo->pages, true, true);
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sg_free_table(bo->sgt);
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kfree(bo->sgt);
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@ -230,7 +230,7 @@ static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo)
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}
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err = dma_map_sg(drm->dev, bo->sgt->sgl, bo->sgt->nents,
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DMA_BIDIRECTIONAL);
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DMA_FROM_DEVICE);
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if (err == 0) {
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err = -EFAULT;
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goto free_sgt;
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