mirror of
https://github.com/torvalds/linux
synced 2024-07-21 10:41:44 +00:00
Merge branch 'intel-wired-lan-driver-updates-2024-05-28-e1000e-i40e-ice'
Jacob Keller says: ==================== Intel Wired LAN Driver Updates 2024-05-28 (e1000e, i40e, ice) [part] This series includes a variety of fixes that have been accumulating on the Intel Wired LAN dev-queue. Hui Wang provides a fix for suspend/resume on e1000e due to failure to correctly setup the SMBUS in enable_ulp(). Thinh Tran provides a fix for EEH I/O suspend/resume on i40e to ensure that I/O operations can continue after a resume. To avoid duplicate code, the common logic is factored out of i40e_suspend and i40e_resume. Paul Greenwalt provides a fix to correctly map the 200G PHY types to link speeds in the ice driver. Dave Ertman provides a fix correcting devlink parameter unregistration in the event that the driver loads in safe mode and some of the parameters were not registered. ==================== Link: https://lore.kernel.org/r/20240528-net-2024-05-28-intel-net-fixes-v1-0-dc8593d2bbc6@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
602d9591a7
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@ -1225,6 +1225,28 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
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}
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release:
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/* Switching PHY interface always returns MDI error
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* so disable retry mechanism to avoid wasting time
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*/
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e1000e_disable_phy_retry(hw);
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/* Force SMBus mode in PHY */
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ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);
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if (ret_val) {
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e1000e_enable_phy_retry(hw);
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hw->phy.ops.release(hw);
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goto out;
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}
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phy_reg |= CV_SMB_CTRL_FORCE_SMBUS;
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e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);
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e1000e_enable_phy_retry(hw);
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/* Force SMBus mode in MAC */
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mac_reg = er32(CTRL_EXT);
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mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;
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ew32(CTRL_EXT, mac_reg);
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hw->phy.ops.release(hw);
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out:
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if (ret_val)
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|
|
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@ -6623,7 +6623,6 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
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struct e1000_hw *hw = &adapter->hw;
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u32 ctrl, ctrl_ext, rctl, status, wufc;
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int retval = 0;
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u16 smb_ctrl;
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/* Runtime suspend should only enable wakeup for link changes */
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if (runtime)
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@ -6697,23 +6696,6 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
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if (retval)
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return retval;
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}
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/* Force SMBUS to allow WOL */
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/* Switching PHY interface always returns MDI error
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* so disable retry mechanism to avoid wasting time
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*/
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e1000e_disable_phy_retry(hw);
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e1e_rphy(hw, CV_SMB_CTRL, &smb_ctrl);
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smb_ctrl |= CV_SMB_CTRL_FORCE_SMBUS;
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e1e_wphy(hw, CV_SMB_CTRL, smb_ctrl);
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e1000e_enable_phy_retry(hw);
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/* Force SMBus mode in MAC */
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ctrl_ext = er32(CTRL_EXT);
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ctrl_ext |= E1000_CTRL_EXT_FORCE_SMBUS;
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ew32(CTRL_EXT, ctrl_ext);
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}
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/* Ensure that the appropriate bits are set in LPI_CTRL
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|
|
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@ -11171,6 +11171,8 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
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ret = i40e_reset(pf);
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if (!ret)
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i40e_rebuild(pf, reinit, lock_acquired);
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else
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dev_err(&pf->pdev->dev, "%s: i40e_reset() FAILED", __func__);
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}
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/**
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@ -16334,6 +16336,139 @@ static void i40e_remove(struct pci_dev *pdev)
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pci_disable_device(pdev);
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}
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/**
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* i40e_enable_mc_magic_wake - enable multicast magic packet wake up
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* using the mac_address_write admin q function
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* @pf: pointer to i40e_pf struct
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**/
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static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
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{
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struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
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struct i40e_hw *hw = &pf->hw;
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u8 mac_addr[6];
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u16 flags = 0;
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int ret;
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/* Get current MAC address in case it's an LAA */
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if (main_vsi && main_vsi->netdev) {
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ether_addr_copy(mac_addr, main_vsi->netdev->dev_addr);
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} else {
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dev_err(&pf->pdev->dev,
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"Failed to retrieve MAC address; using default\n");
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ether_addr_copy(mac_addr, hw->mac.addr);
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}
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|
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/* The FW expects the mac address write cmd to first be called with
|
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* one of these flags before calling it again with the multicast
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* enable flags.
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*/
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flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
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if (hw->func_caps.flex10_enable && hw->partition_id != 1)
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flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
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ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
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if (ret) {
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dev_err(&pf->pdev->dev,
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"Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
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return;
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}
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flags = I40E_AQC_MC_MAG_EN
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| I40E_AQC_WOL_PRESERVE_ON_PFR
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| I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
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ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
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if (ret)
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dev_err(&pf->pdev->dev,
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"Failed to enable Multicast Magic Packet wake up\n");
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}
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||||
/**
|
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* i40e_io_suspend - suspend all IO operations
|
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* @pf: pointer to i40e_pf struct
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*
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**/
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static int i40e_io_suspend(struct i40e_pf *pf)
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{
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struct i40e_hw *hw = &pf->hw;
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set_bit(__I40E_DOWN, pf->state);
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|
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/* Ensure service task will not be running */
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del_timer_sync(&pf->service_timer);
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cancel_work_sync(&pf->service_task);
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|
||||
/* Client close must be called explicitly here because the timer
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* has been stopped.
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*/
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i40e_notify_client_of_netdev_close(pf, false);
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if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
|
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pf->wol_en)
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i40e_enable_mc_magic_wake(pf);
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|
||||
/* Since we're going to destroy queues during the
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* i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
|
||||
* whole section
|
||||
*/
|
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rtnl_lock();
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i40e_prep_for_reset(pf);
|
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wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
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wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
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|
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/* Clear the interrupt scheme and release our IRQs so that the system
|
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* can safely hibernate even when there are a large number of CPUs.
|
||||
* Otherwise hibernation might fail when mapping all the vectors back
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* to CPU0.
|
||||
*/
|
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i40e_clear_interrupt_scheme(pf);
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rtnl_unlock();
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|
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return 0;
|
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}
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|
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/**
|
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* i40e_io_resume - resume IO operations
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* @pf: pointer to i40e_pf struct
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*
|
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**/
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static int i40e_io_resume(struct i40e_pf *pf)
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{
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struct device *dev = &pf->pdev->dev;
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int err;
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|
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/* We need to hold the RTNL lock prior to restoring interrupt schemes,
|
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* since we're going to be restoring queues
|
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*/
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rtnl_lock();
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/* We cleared the interrupt scheme when we suspended, so we need to
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* restore it now to resume device functionality.
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*/
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err = i40e_restore_interrupt_scheme(pf);
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if (err) {
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dev_err(dev, "Cannot restore interrupt scheme: %d\n",
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err);
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}
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clear_bit(__I40E_DOWN, pf->state);
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i40e_reset_and_rebuild(pf, false, true);
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|
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rtnl_unlock();
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|
||||
/* Clear suspended state last after everything is recovered */
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clear_bit(__I40E_SUSPENDED, pf->state);
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|
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/* Restart the service task */
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mod_timer(&pf->service_timer,
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round_jiffies(jiffies + pf->service_timer_period));
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|
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return 0;
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}
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|
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/**
|
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* i40e_pci_error_detected - warning that something funky happened in PCI land
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* @pdev: PCI device information struct
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|
@ -16358,7 +16493,7 @@ static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
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|||
|
||||
/* shutdown all operations */
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if (!test_bit(__I40E_SUSPENDED, pf->state))
|
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i40e_prep_for_reset(pf);
|
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i40e_io_suspend(pf);
|
||||
|
||||
/* Request a slot reset */
|
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return PCI_ERS_RESULT_NEED_RESET;
|
||||
|
@ -16380,7 +16515,8 @@ static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
|
|||
u32 reg;
|
||||
|
||||
dev_dbg(&pdev->dev, "%s\n", __func__);
|
||||
if (pci_enable_device_mem(pdev)) {
|
||||
/* enable I/O and memory of the device */
|
||||
if (pci_enable_device(pdev)) {
|
||||
dev_info(&pdev->dev,
|
||||
"Cannot re-enable PCI device after reset.\n");
|
||||
result = PCI_ERS_RESULT_DISCONNECT;
|
||||
|
@ -16443,54 +16579,7 @@ static void i40e_pci_error_resume(struct pci_dev *pdev)
|
|||
if (test_bit(__I40E_SUSPENDED, pf->state))
|
||||
return;
|
||||
|
||||
i40e_handle_reset_warning(pf, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* i40e_enable_mc_magic_wake - enable multicast magic packet wake up
|
||||
* using the mac_address_write admin q function
|
||||
* @pf: pointer to i40e_pf struct
|
||||
**/
|
||||
static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
|
||||
{
|
||||
struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
|
||||
struct i40e_hw *hw = &pf->hw;
|
||||
u8 mac_addr[6];
|
||||
u16 flags = 0;
|
||||
int ret;
|
||||
|
||||
/* Get current MAC address in case it's an LAA */
|
||||
if (main_vsi && main_vsi->netdev) {
|
||||
ether_addr_copy(mac_addr, main_vsi->netdev->dev_addr);
|
||||
} else {
|
||||
dev_err(&pf->pdev->dev,
|
||||
"Failed to retrieve MAC address; using default\n");
|
||||
ether_addr_copy(mac_addr, hw->mac.addr);
|
||||
}
|
||||
|
||||
/* The FW expects the mac address write cmd to first be called with
|
||||
* one of these flags before calling it again with the multicast
|
||||
* enable flags.
|
||||
*/
|
||||
flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
|
||||
|
||||
if (hw->func_caps.flex10_enable && hw->partition_id != 1)
|
||||
flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
|
||||
|
||||
ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
|
||||
if (ret) {
|
||||
dev_err(&pf->pdev->dev,
|
||||
"Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
|
||||
return;
|
||||
}
|
||||
|
||||
flags = I40E_AQC_MC_MAG_EN
|
||||
| I40E_AQC_WOL_PRESERVE_ON_PFR
|
||||
| I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
|
||||
ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
|
||||
if (ret)
|
||||
dev_err(&pf->pdev->dev,
|
||||
"Failed to enable Multicast Magic Packet wake up\n");
|
||||
i40e_io_resume(pf);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -16552,48 +16641,11 @@ static void i40e_shutdown(struct pci_dev *pdev)
|
|||
static int i40e_suspend(struct device *dev)
|
||||
{
|
||||
struct i40e_pf *pf = dev_get_drvdata(dev);
|
||||
struct i40e_hw *hw = &pf->hw;
|
||||
|
||||
/* If we're already suspended, then there is nothing to do */
|
||||
if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
|
||||
return 0;
|
||||
|
||||
set_bit(__I40E_DOWN, pf->state);
|
||||
|
||||
/* Ensure service task will not be running */
|
||||
del_timer_sync(&pf->service_timer);
|
||||
cancel_work_sync(&pf->service_task);
|
||||
|
||||
/* Client close must be called explicitly here because the timer
|
||||
* has been stopped.
|
||||
*/
|
||||
i40e_notify_client_of_netdev_close(pf, false);
|
||||
|
||||
if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
|
||||
pf->wol_en)
|
||||
i40e_enable_mc_magic_wake(pf);
|
||||
|
||||
/* Since we're going to destroy queues during the
|
||||
* i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
|
||||
* whole section
|
||||
*/
|
||||
rtnl_lock();
|
||||
|
||||
i40e_prep_for_reset(pf);
|
||||
|
||||
wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
|
||||
wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
|
||||
|
||||
/* Clear the interrupt scheme and release our IRQs so that the system
|
||||
* can safely hibernate even when there are a large number of CPUs.
|
||||
* Otherwise hibernation might fail when mapping all the vectors back
|
||||
* to CPU0.
|
||||
*/
|
||||
i40e_clear_interrupt_scheme(pf);
|
||||
|
||||
rtnl_unlock();
|
||||
|
||||
return 0;
|
||||
return i40e_io_suspend(pf);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -16603,39 +16655,11 @@ static int i40e_suspend(struct device *dev)
|
|||
static int i40e_resume(struct device *dev)
|
||||
{
|
||||
struct i40e_pf *pf = dev_get_drvdata(dev);
|
||||
int err;
|
||||
|
||||
/* If we're not suspended, then there is nothing to do */
|
||||
if (!test_bit(__I40E_SUSPENDED, pf->state))
|
||||
return 0;
|
||||
|
||||
/* We need to hold the RTNL lock prior to restoring interrupt schemes,
|
||||
* since we're going to be restoring queues
|
||||
*/
|
||||
rtnl_lock();
|
||||
|
||||
/* We cleared the interrupt scheme when we suspended, so we need to
|
||||
* restore it now to resume device functionality.
|
||||
*/
|
||||
err = i40e_restore_interrupt_scheme(pf);
|
||||
if (err) {
|
||||
dev_err(dev, "Cannot restore interrupt scheme: %d\n",
|
||||
err);
|
||||
}
|
||||
|
||||
clear_bit(__I40E_DOWN, pf->state);
|
||||
i40e_reset_and_rebuild(pf, false, true);
|
||||
|
||||
rtnl_unlock();
|
||||
|
||||
/* Clear suspended state last after everything is recovered */
|
||||
clear_bit(__I40E_SUSPENDED, pf->state);
|
||||
|
||||
/* Restart the service task */
|
||||
mod_timer(&pf->service_timer,
|
||||
round_jiffies(jiffies + pf->service_timer_period));
|
||||
|
||||
return 0;
|
||||
return i40e_io_resume(pf);
|
||||
}
|
||||
|
||||
static const struct pci_error_handlers i40e_err_handler = {
|
||||
|
|
|
@ -1388,7 +1388,7 @@ enum ice_param_id {
|
|||
ICE_DEVLINK_PARAM_ID_TX_SCHED_LAYERS,
|
||||
};
|
||||
|
||||
static const struct devlink_param ice_devlink_params[] = {
|
||||
static const struct devlink_param ice_dvl_rdma_params[] = {
|
||||
DEVLINK_PARAM_GENERIC(ENABLE_ROCE, BIT(DEVLINK_PARAM_CMODE_RUNTIME),
|
||||
ice_devlink_enable_roce_get,
|
||||
ice_devlink_enable_roce_set,
|
||||
|
@ -1397,6 +1397,9 @@ static const struct devlink_param ice_devlink_params[] = {
|
|||
ice_devlink_enable_iw_get,
|
||||
ice_devlink_enable_iw_set,
|
||||
ice_devlink_enable_iw_validate),
|
||||
};
|
||||
|
||||
static const struct devlink_param ice_dvl_sched_params[] = {
|
||||
DEVLINK_PARAM_DRIVER(ICE_DEVLINK_PARAM_ID_TX_SCHED_LAYERS,
|
||||
"tx_scheduling_layers",
|
||||
DEVLINK_PARAM_TYPE_U8,
|
||||
|
@ -1464,21 +1467,31 @@ int ice_devlink_register_params(struct ice_pf *pf)
|
|||
{
|
||||
struct devlink *devlink = priv_to_devlink(pf);
|
||||
struct ice_hw *hw = &pf->hw;
|
||||
size_t params_size;
|
||||
int status;
|
||||
|
||||
params_size = ARRAY_SIZE(ice_devlink_params);
|
||||
status = devl_params_register(devlink, ice_dvl_rdma_params,
|
||||
ARRAY_SIZE(ice_dvl_rdma_params));
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
if (!hw->func_caps.common_cap.tx_sched_topo_comp_mode_en)
|
||||
params_size--;
|
||||
if (hw->func_caps.common_cap.tx_sched_topo_comp_mode_en)
|
||||
status = devl_params_register(devlink, ice_dvl_sched_params,
|
||||
ARRAY_SIZE(ice_dvl_sched_params));
|
||||
|
||||
return devl_params_register(devlink, ice_devlink_params,
|
||||
params_size);
|
||||
return status;
|
||||
}
|
||||
|
||||
void ice_devlink_unregister_params(struct ice_pf *pf)
|
||||
{
|
||||
devl_params_unregister(priv_to_devlink(pf), ice_devlink_params,
|
||||
ARRAY_SIZE(ice_devlink_params));
|
||||
struct devlink *devlink = priv_to_devlink(pf);
|
||||
struct ice_hw *hw = &pf->hw;
|
||||
|
||||
devl_params_unregister(devlink, ice_dvl_rdma_params,
|
||||
ARRAY_SIZE(ice_dvl_rdma_params));
|
||||
|
||||
if (hw->func_caps.common_cap.tx_sched_topo_comp_mode_en)
|
||||
devl_params_unregister(devlink, ice_dvl_sched_params,
|
||||
ARRAY_SIZE(ice_dvl_sched_params));
|
||||
}
|
||||
|
||||
#define ICE_DEVLINK_READ_BLK_SIZE (1024 * 1024)
|
||||
|
|
|
@ -3148,6 +3148,16 @@ ice_get_link_speed_based_on_phy_type(u64 phy_type_low, u64 phy_type_high)
|
|||
case ICE_PHY_TYPE_HIGH_100G_AUI2:
|
||||
speed_phy_type_high = ICE_AQ_LINK_SPEED_100GB;
|
||||
break;
|
||||
case ICE_PHY_TYPE_HIGH_200G_CR4_PAM4:
|
||||
case ICE_PHY_TYPE_HIGH_200G_SR4:
|
||||
case ICE_PHY_TYPE_HIGH_200G_FR4:
|
||||
case ICE_PHY_TYPE_HIGH_200G_LR4:
|
||||
case ICE_PHY_TYPE_HIGH_200G_DR4:
|
||||
case ICE_PHY_TYPE_HIGH_200G_KR4_PAM4:
|
||||
case ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC:
|
||||
case ICE_PHY_TYPE_HIGH_200G_AUI4:
|
||||
speed_phy_type_high = ICE_AQ_LINK_SPEED_200GB;
|
||||
break;
|
||||
default:
|
||||
speed_phy_type_high = ICE_AQ_LINK_SPEED_UNKNOWN;
|
||||
break;
|
||||
|
|
Loading…
Reference in a new issue