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https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
drm/imx: atomic phase 3 step 1: Use atomic configuration
Replacing drm_crtc_helper_set_config() by drm_atomic_helper_set_config() and converting the suspend/resume operations to atomic make us be able to use atomic configurations. All of these allow us to remove the crtc_funcs->mode_set callback as it is no longer used. Also, change the plane_funcs->update/disable_plane callbacks from the transitional version to the atomic version. Furthermore, switching to the pure atomic version of set_config callback means that we may implement CRTC/plane atomic checks by using the new CRTC/plane states instead of the legacy ones and we may remove the private ipu_crtc->enabled state which was left there for the transitional atomic helpers in phase 1. Page flip is also switched to the atomic version. Last, the legacy function drm_helper_disable_unused_functions() is removed from ->load in order not to confuse the atomic driver. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Liu Ying
Philipp Zabel
parent
032003c5cd
commit
5f2f911578
4 changed files with 114 additions and 308 deletions
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@ -15,10 +15,14 @@
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*/
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#include <linux/component.h>
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#include <linux/device.h>
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#include <linux/dma-buf.h>
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#include <linux/fb.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/reservation.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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@ -41,6 +45,7 @@ struct imx_drm_device {
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struct imx_drm_crtc *crtc[MAX_CRTC];
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unsigned int pipes;
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struct drm_fbdev_cma *fbhelper;
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struct drm_atomic_state *state;
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};
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struct imx_drm_crtc {
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@ -169,6 +174,63 @@ static void imx_drm_output_poll_changed(struct drm_device *drm)
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static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
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.fb_create = drm_fb_cma_create,
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.output_poll_changed = imx_drm_output_poll_changed,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
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{
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struct drm_device *dev = state->dev;
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struct drm_crtc *crtc;
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struct drm_crtc_state *crtc_state;
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struct drm_plane_state *plane_state;
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struct drm_gem_cma_object *cma_obj;
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struct fence *excl;
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unsigned shared_count;
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struct fence **shared;
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unsigned int i, j;
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int ret;
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/* Wait for fences. */
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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plane_state = crtc->primary->state;
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if (plane_state->fb) {
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cma_obj = drm_fb_cma_get_gem_obj(plane_state->fb, 0);
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if (cma_obj->base.dma_buf) {
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ret = reservation_object_get_fences_rcu(
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cma_obj->base.dma_buf->resv, &excl,
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&shared_count, &shared);
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if (unlikely(ret))
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DRM_ERROR("failed to get fences "
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"for buffer\n");
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if (excl) {
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fence_wait(excl, false);
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fence_put(excl);
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}
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for (j = 0; j < shared_count; i++) {
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fence_wait(shared[j], false);
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fence_put(shared[j]);
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}
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}
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}
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}
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drm_atomic_helper_commit_modeset_disables(dev, state);
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drm_atomic_helper_commit_planes(dev, state, true);
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drm_atomic_helper_commit_modeset_enables(dev, state);
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drm_atomic_helper_commit_hw_done(state);
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drm_atomic_helper_wait_for_vblanks(dev, state);
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drm_atomic_helper_cleanup_planes(dev, state);
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}
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static struct drm_mode_config_helper_funcs imx_drm_mode_config_helpers = {
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.atomic_commit_tail = imx_drm_atomic_commit_tail,
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};
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/*
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@ -210,6 +272,7 @@ static int imx_drm_driver_load(struct drm_device *drm, unsigned long flags)
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drm->mode_config.max_width = 4096;
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drm->mode_config.max_height = 4096;
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drm->mode_config.funcs = &imx_drm_mode_config_funcs;
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drm->mode_config.helper_private = &imx_drm_mode_config_helpers;
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drm_mode_config_init(drm);
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@ -252,7 +315,6 @@ static int imx_drm_driver_load(struct drm_device *drm, unsigned long flags)
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dev_warn(drm->dev, "Invalid legacyfb_depth. Defaulting to 16bpp\n");
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legacyfb_depth = 16;
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}
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drm_helper_disable_unused_functions(drm);
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imxdrm->fbhelper = drm_fbdev_cma_init(drm, legacyfb_depth,
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drm->mode_config.num_crtc, MAX_CRTC);
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if (IS_ERR(imxdrm->fbhelper)) {
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@ -454,6 +516,7 @@ static int imx_drm_platform_remove(struct platform_device *pdev)
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static int imx_drm_suspend(struct device *dev)
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{
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struct drm_device *drm_dev = dev_get_drvdata(dev);
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struct imx_drm_device *imxdrm;
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/* The drm_dev is NULL before .load hook is called */
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if (drm_dev == NULL)
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@ -461,17 +524,26 @@ static int imx_drm_suspend(struct device *dev)
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drm_kms_helper_poll_disable(drm_dev);
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imxdrm = drm_dev->dev_private;
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imxdrm->state = drm_atomic_helper_suspend(drm_dev);
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if (IS_ERR(imxdrm->state)) {
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drm_kms_helper_poll_enable(drm_dev);
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return PTR_ERR(imxdrm->state);
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}
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return 0;
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}
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static int imx_drm_resume(struct device *dev)
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{
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struct drm_device *drm_dev = dev_get_drvdata(dev);
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struct imx_drm_device *imx_drm;
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if (drm_dev == NULL)
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return 0;
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drm_helper_resume_force_mode(drm_dev);
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imx_drm = drm_dev->dev_private;
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drm_atomic_helper_resume(drm_dev, imx_drm->state);
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drm_kms_helper_poll_enable(drm_dev);
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return 0;
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@ -24,8 +24,6 @@
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#include <linux/fb.h>
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#include <linux/clk.h>
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#include <linux/errno.h>
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#include <linux/reservation.h>
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#include <linux/dma-buf.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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@ -35,23 +33,6 @@
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#define DRIVER_DESC "i.MX IPUv3 Graphics"
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enum ipu_flip_status {
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IPU_FLIP_NONE,
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IPU_FLIP_PENDING,
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IPU_FLIP_SUBMITTED,
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};
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struct ipu_flip_work {
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struct work_struct unref_work;
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struct drm_gem_object *bo;
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struct drm_pending_vblank_event *page_flip_event;
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struct work_struct fence_work;
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struct ipu_crtc *crtc;
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struct fence *excl;
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unsigned shared_count;
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struct fence **shared;
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};
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struct ipu_crtc {
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struct device *dev;
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struct drm_crtc base;
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@ -62,10 +43,6 @@ struct ipu_crtc {
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struct ipu_dc *dc;
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struct ipu_di *di;
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int enabled;
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enum ipu_flip_status flip_state;
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struct workqueue_struct *flip_queue;
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struct ipu_flip_work *flip_work;
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int irq;
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};
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@ -75,34 +52,26 @@ static void ipu_crtc_enable(struct ipu_crtc *ipu_crtc)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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if (ipu_crtc->enabled)
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return;
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ipu_dc_enable(ipu);
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ipu_dc_enable_channel(ipu_crtc->dc);
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ipu_di_enable(ipu_crtc->di);
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ipu_crtc->enabled = 1;
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/*
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* In order not to be warned on enabling vblank failure,
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* we should call drm_crtc_vblank_on() after ->enabled is set to 1.
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*/
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drm_crtc_vblank_on(&ipu_crtc->base);
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}
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static void ipu_crtc_disable(struct ipu_crtc *ipu_crtc)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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if (!ipu_crtc->enabled)
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return;
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struct drm_crtc *crtc = &ipu_crtc->base;
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ipu_dc_disable_channel(ipu_crtc->dc);
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ipu_di_disable(ipu_crtc->di);
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ipu_dc_disable(ipu);
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ipu_crtc->enabled = 0;
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drm_crtc_vblank_off(&ipu_crtc->base);
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spin_lock_irq(&crtc->dev->event_lock);
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if (crtc->state->event) {
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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crtc->state->event = NULL;
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}
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
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@ -123,151 +92,21 @@ static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
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}
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}
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static void ipu_flip_unref_work_func(struct work_struct *__work)
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{
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struct ipu_flip_work *work =
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container_of(__work, struct ipu_flip_work, unref_work);
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drm_gem_object_unreference_unlocked(work->bo);
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kfree(work);
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}
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static void ipu_flip_fence_work_func(struct work_struct *__work)
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{
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struct ipu_flip_work *work =
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container_of(__work, struct ipu_flip_work, fence_work);
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int i;
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/* wait for all fences attached to the FB obj to signal */
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if (work->excl) {
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fence_wait(work->excl, false);
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fence_put(work->excl);
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}
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for (i = 0; i < work->shared_count; i++) {
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fence_wait(work->shared[i], false);
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fence_put(work->shared[i]);
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}
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work->crtc->flip_state = IPU_FLIP_SUBMITTED;
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}
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static int ipu_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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{
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struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct ipu_flip_work *flip_work;
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int ret;
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if (ipu_crtc->flip_state != IPU_FLIP_NONE)
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return -EBUSY;
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ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
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if (ret) {
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dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
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list_del(&event->base.link);
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return ret;
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}
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flip_work = kzalloc(sizeof *flip_work, GFP_KERNEL);
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if (!flip_work) {
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ret = -ENOMEM;
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goto put_vblank;
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}
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INIT_WORK(&flip_work->unref_work, ipu_flip_unref_work_func);
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flip_work->page_flip_event = event;
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/* get BO backing the old framebuffer and take a reference */
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flip_work->bo = &drm_fb_cma_get_gem_obj(crtc->primary->fb, 0)->base;
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drm_gem_object_reference(flip_work->bo);
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ipu_crtc->flip_work = flip_work;
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/*
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* If the object has a DMABUF attached, we need to wait on its fences
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* if there are any.
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*/
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if (cma_obj->base.dma_buf) {
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INIT_WORK(&flip_work->fence_work, ipu_flip_fence_work_func);
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flip_work->crtc = ipu_crtc;
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ret = reservation_object_get_fences_rcu(
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cma_obj->base.dma_buf->resv, &flip_work->excl,
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&flip_work->shared_count, &flip_work->shared);
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if (unlikely(ret)) {
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DRM_ERROR("failed to get fences for buffer\n");
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goto free_flip_work;
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}
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/* No need to queue the worker if the are no fences */
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if (!flip_work->excl && !flip_work->shared_count) {
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ipu_crtc->flip_state = IPU_FLIP_SUBMITTED;
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} else {
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ipu_crtc->flip_state = IPU_FLIP_PENDING;
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queue_work(ipu_crtc->flip_queue,
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&flip_work->fence_work);
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}
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} else {
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ipu_crtc->flip_state = IPU_FLIP_SUBMITTED;
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}
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if (crtc->primary->state)
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drm_atomic_set_fb_for_plane(crtc->primary->state, fb);
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return 0;
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free_flip_work:
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drm_gem_object_unreference_unlocked(flip_work->bo);
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kfree(flip_work);
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ipu_crtc->flip_work = NULL;
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put_vblank:
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imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
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return ret;
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}
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static const struct drm_crtc_funcs ipu_crtc_funcs = {
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.set_config = drm_crtc_helper_set_config,
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.set_config = drm_atomic_helper_set_config,
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.destroy = drm_crtc_cleanup,
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.page_flip = ipu_page_flip,
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.page_flip = drm_atomic_helper_page_flip,
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.reset = drm_atomic_helper_crtc_reset,
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.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
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};
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static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
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{
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unsigned long flags;
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struct drm_device *drm = ipu_crtc->base.dev;
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struct ipu_flip_work *work = ipu_crtc->flip_work;
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spin_lock_irqsave(&drm->event_lock, flags);
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if (work->page_flip_event)
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drm_crtc_send_vblank_event(&ipu_crtc->base,
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work->page_flip_event);
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imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
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spin_unlock_irqrestore(&drm->event_lock, flags);
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}
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static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
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{
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struct ipu_crtc *ipu_crtc = dev_id;
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imx_drm_handle_vblank(ipu_crtc->imx_crtc);
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if (ipu_crtc->flip_state == IPU_FLIP_SUBMITTED) {
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struct ipu_plane *plane = ipu_crtc->plane[0];
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ipu_plane_set_base(plane, ipu_crtc->base.primary->fb);
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ipu_crtc_handle_pageflip(ipu_crtc);
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queue_work(ipu_crtc->flip_queue,
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&ipu_crtc->flip_work->unref_work);
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ipu_crtc->flip_state = IPU_FLIP_NONE;
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}
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return IRQ_HANDLED;
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}
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@ -310,9 +149,26 @@ static void ipu_crtc_commit(struct drm_crtc *crtc)
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static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
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if (state->active && (primary_plane_mask & state->plane_mask) == 0)
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return -EINVAL;
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return 0;
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}
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static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state)
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{
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spin_lock_irq(&crtc->dev->event_lock);
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if (crtc->state->event) {
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WARN_ON(drm_crtc_vblank_get(crtc));
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drm_crtc_arm_vblank_event(crtc, crtc->state->event);
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crtc->state->event = NULL;
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}
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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@ -371,25 +227,17 @@ static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
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static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
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.dpms = ipu_crtc_dpms,
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.mode_fixup = ipu_crtc_mode_fixup,
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.mode_set = drm_helper_crtc_mode_set,
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.mode_set_nofb = ipu_crtc_mode_set_nofb,
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.prepare = ipu_crtc_prepare,
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.commit = ipu_crtc_commit,
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.atomic_check = ipu_crtc_atomic_check,
|
||||
.atomic_begin = ipu_crtc_atomic_begin,
|
||||
};
|
||||
|
||||
static int ipu_enable_vblank(struct drm_crtc *crtc)
|
||||
{
|
||||
struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
|
||||
|
||||
/*
|
||||
* ->commit is done after ->mode_set in drm_crtc_helper_set_mode(),
|
||||
* so waiting for vblank in drm_plane_helper_commit() will timeout.
|
||||
* Check the state here to avoid the waiting.
|
||||
*/
|
||||
if (!ipu_crtc->enabled)
|
||||
return -EINVAL;
|
||||
|
||||
enable_irq(ipu_crtc->irq);
|
||||
|
||||
return 0;
|
||||
|
|
@ -508,8 +356,6 @@ static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
|
|||
/* Only enable IRQ when we actually need it to trigger work. */
|
||||
disable_irq(ipu_crtc->irq);
|
||||
|
||||
ipu_crtc->flip_queue = create_singlethread_workqueue("ipu-crtc-flip");
|
||||
|
||||
return 0;
|
||||
|
||||
err_put_plane1_res:
|
||||
|
|
@ -554,7 +400,6 @@ static void ipu_drm_unbind(struct device *dev, struct device *master,
|
|||
|
||||
imx_drm_remove_crtc(ipu_crtc->imx_crtc);
|
||||
|
||||
destroy_workqueue(ipu_crtc->flip_queue);
|
||||
ipu_put_resources(ipu_crtc);
|
||||
if (ipu_crtc->plane[1])
|
||||
ipu_plane_put_resources(ipu_crtc->plane[1]);
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
*/
|
||||
|
||||
#include <drm/drmP.h>
|
||||
#include <drm/drm_atomic.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
#include <drm/drm_fb_cma_helper.h>
|
||||
#include <drm/drm_gem_cma_helper.h>
|
||||
|
|
@ -55,122 +56,6 @@ int ipu_plane_irq(struct ipu_plane *ipu_plane)
|
|||
IPU_IRQ_EOF);
|
||||
}
|
||||
|
||||
int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb)
|
||||
{
|
||||
struct drm_gem_cma_object *cma_obj[3], *old_cma_obj[3];
|
||||
struct drm_plane_state *state = ipu_plane->base.state;
|
||||
struct drm_framebuffer *old_fb = state->fb;
|
||||
unsigned long eba, ubo, vbo, old_eba, old_ubo, old_vbo;
|
||||
int active, i;
|
||||
int x = state->src_x >> 16;
|
||||
int y = state->src_y >> 16;
|
||||
|
||||
for (i = 0; i < drm_format_num_planes(fb->pixel_format); i++) {
|
||||
cma_obj[i] = drm_fb_cma_get_gem_obj(fb, i);
|
||||
if (!cma_obj[i]) {
|
||||
DRM_DEBUG_KMS("plane %d entry is null.\n", i);
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < drm_format_num_planes(old_fb->pixel_format); i++) {
|
||||
old_cma_obj[i] = drm_fb_cma_get_gem_obj(old_fb, i);
|
||||
if (!old_cma_obj[i]) {
|
||||
DRM_DEBUG_KMS("plane %d entry is null.\n", i);
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
eba = cma_obj[0]->paddr + fb->offsets[0] +
|
||||
fb->pitches[0] * y + (fb->bits_per_pixel >> 3) * x;
|
||||
|
||||
if (eba & 0x7) {
|
||||
DRM_DEBUG_KMS("base address must be a multiple of 8.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fb->pitches[0] < 1 || fb->pitches[0] > 16384) {
|
||||
DRM_DEBUG_KMS("pitches out of range.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fb->pitches[0] != old_fb->pitches[0]) {
|
||||
DRM_DEBUG_KMS("pitches must not change while plane is enabled.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (fb->pixel_format) {
|
||||
case DRM_FORMAT_YUV420:
|
||||
case DRM_FORMAT_YVU420:
|
||||
/*
|
||||
* Multiplanar formats have to meet the following restrictions:
|
||||
* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
|
||||
* - EBA, UBO and VBO are a multiple of 8
|
||||
* - UBO and VBO are unsigned and not larger than 0xfffff8
|
||||
* - Only EBA may be changed while scanout is active
|
||||
* - The strides of U and V planes must be identical.
|
||||
*/
|
||||
ubo = cma_obj[1]->paddr + fb->offsets[1] +
|
||||
fb->pitches[1] * y / 2 + x / 2 - eba;
|
||||
vbo = cma_obj[2]->paddr + fb->offsets[2] +
|
||||
fb->pitches[2] * y / 2 + x / 2 - eba;
|
||||
|
||||
old_eba = old_cma_obj[0]->paddr + old_fb->offsets[0] +
|
||||
old_fb->pitches[0] * y +
|
||||
(old_fb->bits_per_pixel >> 3) * x;
|
||||
old_ubo = old_cma_obj[1]->paddr + old_fb->offsets[1] +
|
||||
old_fb->pitches[1] * y / 2 + x / 2 - old_eba;
|
||||
old_vbo = old_cma_obj[2]->paddr + old_fb->offsets[2] +
|
||||
old_fb->pitches[2] * y / 2 + x / 2 - old_eba;
|
||||
|
||||
if ((ubo & 0x7) || (vbo & 0x7)) {
|
||||
DRM_DEBUG_KMS("U/V buffer offsets must be a multiple of 8.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((ubo > 0xfffff8) || (vbo > 0xfffff8)) {
|
||||
DRM_DEBUG_KMS("U/V buffer offsets must be positive and not larger than 0xfffff8.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (old_ubo != ubo || old_vbo != vbo) {
|
||||
DRM_DEBUG_KMS("U/V buffer offsets must not change while plane is enabled.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fb->pitches[1] != fb->pitches[2]) {
|
||||
DRM_DEBUG_KMS("U/V pitches must be identical.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fb->pitches[1] < 1 || fb->pitches[1] > 16384) {
|
||||
DRM_DEBUG_KMS("U/V pitches out of range.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (old_fb->pitches[1] != fb->pitches[1]) {
|
||||
DRM_DEBUG_KMS("U/V pitches must not change while plane is enabled.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
dev_dbg(ipu_plane->base.dev->dev,
|
||||
"phys = %pad %pad %pad, x = %d, y = %d",
|
||||
&cma_obj[0]->paddr, &cma_obj[1]->paddr,
|
||||
&cma_obj[2]->paddr, x, y);
|
||||
break;
|
||||
default:
|
||||
dev_dbg(ipu_plane->base.dev->dev, "phys = %pad, x = %d, y = %d",
|
||||
&cma_obj[0]->paddr, x, y);
|
||||
break;
|
||||
}
|
||||
|
||||
active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
|
||||
ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
|
||||
ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline unsigned long
|
||||
drm_plane_state_to_eba(struct drm_plane_state *state)
|
||||
{
|
||||
|
|
@ -360,8 +245,8 @@ static void ipu_plane_destroy(struct drm_plane *plane)
|
|||
}
|
||||
|
||||
static const struct drm_plane_funcs ipu_plane_funcs = {
|
||||
.update_plane = drm_plane_helper_update,
|
||||
.disable_plane = drm_plane_helper_disable,
|
||||
.update_plane = drm_atomic_helper_update_plane,
|
||||
.disable_plane = drm_atomic_helper_disable_plane,
|
||||
.destroy = ipu_plane_destroy,
|
||||
.reset = drm_atomic_helper_plane_reset,
|
||||
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
|
||||
|
|
@ -380,10 +265,18 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
|
|||
|
||||
/* Ok to disable */
|
||||
if (!fb)
|
||||
return old_fb ? 0 : -EINVAL;
|
||||
return 0;
|
||||
|
||||
if (!state->crtc)
|
||||
return -EINVAL;
|
||||
|
||||
crtc_state =
|
||||
drm_atomic_get_existing_crtc_state(state->state, state->crtc);
|
||||
if (WARN_ON(!crtc_state))
|
||||
return -EINVAL;
|
||||
|
||||
/* CRTC should be enabled */
|
||||
if (!state->crtc->enabled)
|
||||
if (!crtc_state->enable)
|
||||
return -EINVAL;
|
||||
|
||||
/* no scaling */
|
||||
|
|
@ -391,8 +284,6 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
|
|||
state->src_h >> 16 != state->crtc_h)
|
||||
return -EINVAL;
|
||||
|
||||
crtc_state = state->crtc->state;
|
||||
|
||||
switch (plane->type) {
|
||||
case DRM_PLANE_TYPE_PRIMARY:
|
||||
/* full plane doesn't support partial off screen */
|
||||
|
|
|
|||
|
|
@ -37,8 +37,6 @@ int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc,
|
|||
uint32_t src_x, uint32_t src_y, uint32_t src_w,
|
||||
uint32_t src_h, bool interlaced);
|
||||
|
||||
int ipu_plane_set_base(struct ipu_plane *plane, struct drm_framebuffer *fb);
|
||||
|
||||
int ipu_plane_get_resources(struct ipu_plane *plane);
|
||||
void ipu_plane_put_resources(struct ipu_plane *plane);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue