mirror of
https://github.com/torvalds/linux
synced 2024-09-22 12:26:27 +00:00
drm/i915: Rename struct intel_crtc_config to intel_crtc_state
The objective is to make this structure usable with the atomic helpers,
so let's start with the rename. Patch generated with coccinelle:
@@ @@
-struct intel_crtc_config {
+struct intel_crtc_state {
...
}
@@ @@
-struct intel_crtc_config
+struct intel_crtc_state
v2: Completely generate the patch with cocci. (Ander)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ander Conselvan de Oliveira
Daniel Vetter
parent
96178eeb37
commit
5cec258b4f
|
|
@ -499,7 +499,7 @@ struct drm_i915_error_state {
|
|||
|
||||
struct intel_connector;
|
||||
struct intel_encoder;
|
||||
struct intel_crtc_config;
|
||||
struct intel_crtc_state;
|
||||
struct intel_plane_config;
|
||||
struct intel_crtc;
|
||||
struct intel_limit;
|
||||
|
|
@ -538,7 +538,7 @@ struct drm_i915_display_funcs {
|
|||
/* Returns the active state of the crtc, and if the crtc is active,
|
||||
* fills out the pipe-config with the hw state. */
|
||||
bool (*get_pipe_config)(struct intel_crtc *,
|
||||
struct intel_crtc_config *);
|
||||
struct intel_crtc_state *);
|
||||
void (*get_plane_config)(struct intel_crtc *,
|
||||
struct intel_plane_config *);
|
||||
int (*crtc_compute_clock)(struct intel_crtc *crtc);
|
||||
|
|
|
|||
|
|
@ -110,7 +110,7 @@ static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
|
|||
}
|
||||
|
||||
static void intel_crt_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
int dotclock;
|
||||
|
|
@ -126,7 +126,7 @@ static void intel_crt_get_config(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void hsw_crt_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
intel_ddi_get_config(encoder, pipe_config);
|
||||
|
||||
|
|
@ -303,7 +303,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
|
|||
}
|
||||
|
||||
static bool intel_crt_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
|
||||
|
|
|
|||
|
|
@ -732,7 +732,7 @@ static int skl_calc_wrpll_link(struct drm_i915_private *dev_priv,
|
|||
|
||||
|
||||
static void skl_ddi_clock_get(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
|
||||
int link_clock = 0;
|
||||
|
|
@ -776,7 +776,7 @@ static void skl_ddi_clock_get(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void hsw_ddi_clock_get(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
|
||||
int link_clock = 0;
|
||||
|
|
@ -832,7 +832,7 @@ static void hsw_ddi_clock_get(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
void intel_ddi_clock_get(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
|
||||
|
|
@ -2027,7 +2027,7 @@ static void intel_ddi_hot_plug(struct intel_encoder *intel_encoder)
|
|||
}
|
||||
|
||||
void intel_ddi_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
|
||||
|
|
@ -2120,7 +2120,7 @@ static void intel_ddi_destroy(struct drm_encoder *encoder)
|
|||
}
|
||||
|
||||
static bool intel_ddi_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
int type = encoder->type;
|
||||
int port = intel_ddi_get_encoder_port(encoder);
|
||||
|
|
|
|||
|
|
@ -76,9 +76,9 @@ static const uint32_t intel_cursor_formats[] = {
|
|||
static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
|
||||
|
||||
static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
static void ironlake_pch_clock_get(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
|
||||
static int intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
|
||||
int x, int y, struct drm_framebuffer *old_fb);
|
||||
|
|
@ -95,9 +95,9 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc);
|
|||
static void haswell_set_pipeconf(struct drm_crtc *crtc);
|
||||
static void intel_set_pipe_csc(struct drm_crtc *crtc);
|
||||
static void vlv_prepare_pll(struct intel_crtc *crtc,
|
||||
const struct intel_crtc_config *pipe_config);
|
||||
const struct intel_crtc_state *pipe_config);
|
||||
static void chv_prepare_pll(struct intel_crtc *crtc,
|
||||
const struct intel_crtc_config *pipe_config);
|
||||
const struct intel_crtc_state *pipe_config);
|
||||
static void intel_begin_crtc_commit(struct drm_crtc *crtc);
|
||||
static void intel_finish_crtc_commit(struct drm_crtc *crtc);
|
||||
|
||||
|
|
@ -1507,7 +1507,7 @@ static void intel_init_dpio(struct drm_device *dev)
|
|||
}
|
||||
|
||||
static void vlv_enable_pll(struct intel_crtc *crtc,
|
||||
const struct intel_crtc_config *pipe_config)
|
||||
const struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -1546,7 +1546,7 @@ static void vlv_enable_pll(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void chv_enable_pll(struct intel_crtc *crtc,
|
||||
const struct intel_crtc_config *pipe_config)
|
||||
const struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -4602,7 +4602,7 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
|
|||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_crtc_config *pipe_config = &crtc->config;
|
||||
struct intel_crtc_state *pipe_config = &crtc->config;
|
||||
|
||||
if (!crtc->config.gmch_pfit.control)
|
||||
return;
|
||||
|
|
@ -5367,7 +5367,7 @@ bool intel_connector_get_hw_state(struct intel_connector *connector)
|
|||
}
|
||||
|
||||
static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_crtc *pipe_B_crtc =
|
||||
|
|
@ -5426,7 +5426,7 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
|
|||
|
||||
#define RETRY 1
|
||||
static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = intel_crtc->base.dev;
|
||||
struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
|
||||
|
|
@ -5472,7 +5472,7 @@ static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
|
|||
}
|
||||
|
||||
static void hsw_compute_ips_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
pipe_config->ips_enabled = i915.enable_ips &&
|
||||
hsw_crtc_supports_ips(crtc) &&
|
||||
|
|
@ -5480,7 +5480,7 @@ static void hsw_compute_ips_config(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static int intel_crtc_compute_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -5842,7 +5842,7 @@ void intel_dp_set_m_n(struct intel_crtc *crtc)
|
|||
}
|
||||
|
||||
static void vlv_update_pll(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
u32 dpll, dpll_md;
|
||||
|
||||
|
|
@ -5865,7 +5865,7 @@ static void vlv_update_pll(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void vlv_prepare_pll(struct intel_crtc *crtc,
|
||||
const struct intel_crtc_config *pipe_config)
|
||||
const struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -5956,7 +5956,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void chv_update_pll(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
pipe_config->dpll_hw_state.dpll = DPLL_SSC_REF_CLOCK_CHV |
|
||||
DPLL_REFA_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS |
|
||||
|
|
@ -5969,7 +5969,7 @@ static void chv_update_pll(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void chv_prepare_pll(struct intel_crtc *crtc,
|
||||
const struct intel_crtc_config *pipe_config)
|
||||
const struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -6054,7 +6054,7 @@ void vlv_force_pll_on(struct drm_device *dev, enum pipe pipe,
|
|||
{
|
||||
struct intel_crtc *crtc =
|
||||
to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
|
||||
struct intel_crtc_config pipe_config = {
|
||||
struct intel_crtc_state pipe_config = {
|
||||
.pixel_multiplier = 1,
|
||||
.dpll = *dpll,
|
||||
};
|
||||
|
|
@ -6269,7 +6269,7 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
|
|||
}
|
||||
|
||||
static void intel_get_pipe_timings(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -6311,7 +6311,7 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
void intel_mode_from_pipe_config(struct drm_display_mode *mode,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
mode->hdisplay = pipe_config->adjusted_mode.crtc_hdisplay;
|
||||
mode->htotal = pipe_config->adjusted_mode.crtc_htotal;
|
||||
|
|
@ -6481,7 +6481,7 @@ static int i9xx_crtc_compute_clock(struct intel_crtc *crtc)
|
|||
}
|
||||
|
||||
static void i9xx_get_pfit_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -6511,7 +6511,7 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void vlv_crtc_clock_get(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -6602,7 +6602,7 @@ static void i9xx_get_plane_config(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void chv_crtc_clock_get(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -6632,7 +6632,7 @@ static void chv_crtc_clock_get(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -7534,7 +7534,7 @@ static void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
void intel_dp_get_m_n(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
if (crtc->config.has_pch_encoder)
|
||||
intel_pch_transcoder_get_m_n(crtc, &pipe_config->dp_m_n);
|
||||
|
|
@ -7545,14 +7545,14 @@ void intel_dp_get_m_n(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
intel_cpu_transcoder_get_m_n(crtc, pipe_config->cpu_transcoder,
|
||||
&pipe_config->fdi_m_n, NULL);
|
||||
}
|
||||
|
||||
static void skylake_get_pfit_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -7568,7 +7568,7 @@ static void skylake_get_pfit_config(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static void ironlake_get_pfit_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -7652,7 +7652,7 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -7982,7 +7982,7 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc)
|
|||
|
||||
static void skylake_get_ddi_pll(struct drm_i915_private *dev_priv,
|
||||
enum port port,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
u32 temp, dpll_ctl1;
|
||||
|
||||
|
|
@ -8013,7 +8013,7 @@ static void skylake_get_ddi_pll(struct drm_i915_private *dev_priv,
|
|||
|
||||
static void haswell_get_ddi_pll(struct drm_i915_private *dev_priv,
|
||||
enum port port,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
pipe_config->ddi_pll_sel = I915_READ(PORT_CLK_SEL(port));
|
||||
|
||||
|
|
@ -8028,7 +8028,7 @@ static void haswell_get_ddi_pll(struct drm_i915_private *dev_priv,
|
|||
}
|
||||
|
||||
static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -8070,7 +8070,7 @@ static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
|
|||
}
|
||||
|
||||
static bool haswell_get_pipe_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -8652,7 +8652,7 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
|
|||
}
|
||||
|
||||
static int i9xx_pll_refclk(struct drm_device *dev,
|
||||
const struct intel_crtc_config *pipe_config)
|
||||
const struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
u32 dpll = pipe_config->dpll_hw_state.dpll;
|
||||
|
|
@ -8669,7 +8669,7 @@ static int i9xx_pll_refclk(struct drm_device *dev,
|
|||
|
||||
/* Returns the clock of the currently programmed mode of the given pipe. */
|
||||
static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -8776,7 +8776,7 @@ int intel_dotclock_calculate(int link_freq,
|
|||
}
|
||||
|
||||
static void ironlake_pch_clock_get(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
|
||||
|
|
@ -8802,7 +8802,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
|
|||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
|
||||
struct drm_display_mode *mode;
|
||||
struct intel_crtc_config pipe_config;
|
||||
struct intel_crtc_state pipe_config;
|
||||
int htot = I915_READ(HTOTAL(cpu_transcoder));
|
||||
int hsync = I915_READ(HSYNC(cpu_transcoder));
|
||||
int vtot = I915_READ(VTOTAL(cpu_transcoder));
|
||||
|
|
@ -9851,7 +9851,7 @@ static void intel_modeset_commit_output_state(struct drm_device *dev)
|
|||
|
||||
static void
|
||||
connected_sink_compute_bpp(struct intel_connector *connector,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
int bpp = pipe_config->pipe_bpp;
|
||||
|
||||
|
|
@ -9878,7 +9878,7 @@ connected_sink_compute_bpp(struct intel_connector *connector,
|
|||
static int
|
||||
compute_baseline_pipe_bpp(struct intel_crtc *crtc,
|
||||
struct drm_framebuffer *fb,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = crtc->base.dev;
|
||||
struct intel_connector *connector;
|
||||
|
|
@ -9947,7 +9947,7 @@ static void intel_dump_crtc_timings(const struct drm_display_mode *mode)
|
|||
}
|
||||
|
||||
static void intel_dump_pipe_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
const char *context)
|
||||
{
|
||||
DRM_DEBUG_KMS("[CRTC:%d]%s config for pipe %c\n", crtc->base.base.id,
|
||||
|
|
@ -10083,14 +10083,14 @@ static bool check_digital_port_conflicts(struct drm_device *dev)
|
|||
return true;
|
||||
}
|
||||
|
||||
static struct intel_crtc_config *
|
||||
static struct intel_crtc_state *
|
||||
intel_modeset_pipe_config(struct drm_crtc *crtc,
|
||||
struct drm_framebuffer *fb,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
struct drm_device *dev = crtc->dev;
|
||||
struct intel_encoder *encoder;
|
||||
struct intel_crtc_config *pipe_config;
|
||||
struct intel_crtc_state *pipe_config;
|
||||
int plane_bpp, ret = -EINVAL;
|
||||
bool retry = true;
|
||||
|
||||
|
|
@ -10384,8 +10384,8 @@ static bool intel_fuzzy_clock_check(int clock1, int clock2)
|
|||
|
||||
static bool
|
||||
intel_pipe_config_compare(struct drm_device *dev,
|
||||
struct intel_crtc_config *current_config,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *current_config,
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
#define PIPE_CONF_CHECK_X(name) \
|
||||
if (current_config->name != pipe_config->name) { \
|
||||
|
|
@ -10709,7 +10709,7 @@ check_crtc_state(struct drm_device *dev)
|
|||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_crtc *crtc;
|
||||
struct intel_encoder *encoder;
|
||||
struct intel_crtc_config pipe_config;
|
||||
struct intel_crtc_state pipe_config;
|
||||
|
||||
for_each_intel_crtc(dev, crtc) {
|
||||
bool enabled = false;
|
||||
|
|
@ -10828,7 +10828,7 @@ intel_modeset_check_state(struct drm_device *dev)
|
|||
check_shared_dpll_state(dev);
|
||||
}
|
||||
|
||||
void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
|
||||
void ironlake_check_encoder_dotclock(const struct intel_crtc_state *pipe_config,
|
||||
int dotclock)
|
||||
{
|
||||
/*
|
||||
|
|
@ -10878,7 +10878,7 @@ static void update_scanline_offset(struct intel_crtc *crtc)
|
|||
crtc->scanline_offset = 1;
|
||||
}
|
||||
|
||||
static struct intel_crtc_config *
|
||||
static struct intel_crtc_state *
|
||||
intel_modeset_compute_config(struct drm_crtc *crtc,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_framebuffer *fb,
|
||||
|
|
@ -10886,7 +10886,7 @@ intel_modeset_compute_config(struct drm_crtc *crtc,
|
|||
unsigned *prepare_pipes,
|
||||
unsigned *disable_pipes)
|
||||
{
|
||||
struct intel_crtc_config *pipe_config = NULL;
|
||||
struct intel_crtc_state *pipe_config = NULL;
|
||||
|
||||
intel_modeset_affected_pipes(crtc, modeset_pipes,
|
||||
prepare_pipes, disable_pipes);
|
||||
|
|
@ -10914,7 +10914,7 @@ intel_modeset_compute_config(struct drm_crtc *crtc,
|
|||
static int __intel_set_mode(struct drm_crtc *crtc,
|
||||
struct drm_display_mode *mode,
|
||||
int x, int y, struct drm_framebuffer *fb,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
unsigned modeset_pipes,
|
||||
unsigned prepare_pipes,
|
||||
unsigned disable_pipes)
|
||||
|
|
@ -11036,7 +11036,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
|
|||
static int intel_set_mode_pipes(struct drm_crtc *crtc,
|
||||
struct drm_display_mode *mode,
|
||||
int x, int y, struct drm_framebuffer *fb,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
unsigned modeset_pipes,
|
||||
unsigned prepare_pipes,
|
||||
unsigned disable_pipes)
|
||||
|
|
@ -11056,7 +11056,7 @@ static int intel_set_mode(struct drm_crtc *crtc,
|
|||
struct drm_display_mode *mode,
|
||||
int x, int y, struct drm_framebuffer *fb)
|
||||
{
|
||||
struct intel_crtc_config *pipe_config;
|
||||
struct intel_crtc_state *pipe_config;
|
||||
unsigned modeset_pipes, prepare_pipes, disable_pipes;
|
||||
|
||||
pipe_config = intel_modeset_compute_config(crtc, mode, fb,
|
||||
|
|
@ -11400,7 +11400,7 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
|
|||
struct drm_device *dev;
|
||||
struct drm_mode_set save_set;
|
||||
struct intel_set_config *config;
|
||||
struct intel_crtc_config *pipe_config;
|
||||
struct intel_crtc_state *pipe_config;
|
||||
unsigned modeset_pipes, prepare_pipes, disable_pipes;
|
||||
int ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -1074,7 +1074,7 @@ intel_dp_connector_unregister(struct intel_connector *intel_connector)
|
|||
}
|
||||
|
||||
static void
|
||||
skl_edp_set_pll_config(struct intel_crtc_config *pipe_config, int link_bw)
|
||||
skl_edp_set_pll_config(struct intel_crtc_state *pipe_config, int link_bw)
|
||||
{
|
||||
u32 ctrl1;
|
||||
|
||||
|
|
@ -1101,7 +1101,7 @@ skl_edp_set_pll_config(struct intel_crtc_config *pipe_config, int link_bw)
|
|||
}
|
||||
|
||||
static void
|
||||
hsw_dp_set_ddi_pll_sel(struct intel_crtc_config *pipe_config, int link_bw)
|
||||
hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config, int link_bw)
|
||||
{
|
||||
switch (link_bw) {
|
||||
case DP_LINK_BW_1_62:
|
||||
|
|
@ -1118,7 +1118,7 @@ hsw_dp_set_ddi_pll_sel(struct intel_crtc_config *pipe_config, int link_bw)
|
|||
|
||||
static void
|
||||
intel_dp_set_clock(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config, int link_bw)
|
||||
struct intel_crtc_state *pipe_config, int link_bw)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
const struct dp_link_dpll *divisor = NULL;
|
||||
|
|
@ -1151,7 +1151,7 @@ intel_dp_set_clock(struct intel_encoder *encoder,
|
|||
|
||||
bool
|
||||
intel_dp_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -2013,7 +2013,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_dp_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
|
||||
u32 tmp, flags = 0;
|
||||
|
|
@ -4751,7 +4751,7 @@ static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
|
|||
struct intel_encoder *encoder;
|
||||
struct intel_digital_port *dig_port = NULL;
|
||||
struct intel_dp *intel_dp = dev_priv->drrs.dp;
|
||||
struct intel_crtc_config *config = NULL;
|
||||
struct intel_crtc_state *config = NULL;
|
||||
struct intel_crtc *intel_crtc = NULL;
|
||||
u32 reg, val;
|
||||
enum drrs_refresh_rate_type index = DRRS_HIGH_RR;
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
#include <drm/drm_edid.h>
|
||||
|
||||
static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
||||
struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
||||
|
|
@ -216,7 +216,7 @@ static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
||||
struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ struct intel_encoder {
|
|||
bool connectors_active;
|
||||
void (*hot_plug)(struct intel_encoder *);
|
||||
bool (*compute_config)(struct intel_encoder *,
|
||||
struct intel_crtc_config *);
|
||||
struct intel_crtc_state *);
|
||||
void (*pre_pll_enable)(struct intel_encoder *);
|
||||
void (*pre_enable)(struct intel_encoder *);
|
||||
void (*enable)(struct intel_encoder *);
|
||||
|
|
@ -159,7 +159,7 @@ struct intel_encoder {
|
|||
* pre-filled the pipe config. Note that intel_encoder->base.crtc must
|
||||
* be set correctly before calling this function. */
|
||||
void (*get_config)(struct intel_encoder *,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
/*
|
||||
* Called during system suspend after all pending requests for the
|
||||
* encoder are flushed (for example for DP AUX transactions) and
|
||||
|
|
@ -263,7 +263,7 @@ struct intel_plane_config {
|
|||
u32 base;
|
||||
};
|
||||
|
||||
struct intel_crtc_config {
|
||||
struct intel_crtc_state {
|
||||
/**
|
||||
* quirks - bitfield with hw state readout quirks
|
||||
*
|
||||
|
|
@ -477,8 +477,8 @@ struct intel_crtc {
|
|||
uint32_t cursor_base;
|
||||
|
||||
struct intel_plane_config plane_config;
|
||||
struct intel_crtc_config config;
|
||||
struct intel_crtc_config *new_config;
|
||||
struct intel_crtc_state config;
|
||||
struct intel_crtc_state *new_config;
|
||||
bool new_enabled;
|
||||
|
||||
/* reset counter value when the last flip was submitted */
|
||||
|
|
@ -845,11 +845,11 @@ void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
|
|||
bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
|
||||
void intel_ddi_fdi_disable(struct drm_crtc *crtc);
|
||||
void intel_ddi_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
|
||||
void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder);
|
||||
void intel_ddi_clock_get(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state);
|
||||
|
||||
/* intel_frontbuffer.c */
|
||||
|
|
@ -982,11 +982,11 @@ void intel_finish_reset(struct drm_device *dev);
|
|||
void hsw_enable_pc8(struct drm_i915_private *dev_priv);
|
||||
void hsw_disable_pc8(struct drm_i915_private *dev_priv);
|
||||
void intel_dp_get_m_n(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
void intel_dp_set_m_n(struct intel_crtc *crtc);
|
||||
int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
|
||||
void
|
||||
ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
|
||||
ironlake_check_encoder_dotclock(const struct intel_crtc_state *pipe_config,
|
||||
int dotclock);
|
||||
bool intel_crtc_active(struct drm_crtc *crtc);
|
||||
void hsw_enable_ips(struct intel_crtc *crtc);
|
||||
|
|
@ -994,7 +994,7 @@ void hsw_disable_ips(struct intel_crtc *crtc);
|
|||
enum intel_display_power_domain
|
||||
intel_display_port_power_domain(struct intel_encoder *intel_encoder);
|
||||
void intel_mode_from_pipe_config(struct drm_display_mode *mode,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
int intel_format_to_fourcc(int format);
|
||||
void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc);
|
||||
void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
|
||||
|
|
@ -1011,7 +1011,7 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder);
|
|||
void intel_dp_check_link_status(struct intel_dp *intel_dp);
|
||||
int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
|
||||
bool intel_dp_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
bool intel_dp_is_edp(struct drm_device *dev, enum port port);
|
||||
bool intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port,
|
||||
bool long_hpd);
|
||||
|
|
@ -1091,7 +1091,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
|
|||
struct intel_connector *intel_connector);
|
||||
struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
|
||||
bool intel_hdmi_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config);
|
||||
struct intel_crtc_state *pipe_config);
|
||||
|
||||
|
||||
/* intel_lvds.c */
|
||||
|
|
@ -1126,10 +1126,10 @@ void intel_panel_fini(struct intel_panel *panel);
|
|||
void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
|
||||
struct drm_display_mode *adjusted_mode);
|
||||
void intel_pch_panel_fitting(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
int fitting_mode);
|
||||
void intel_gmch_panel_fitting(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
int fitting_mode);
|
||||
void intel_panel_set_backlight_acpi(struct intel_connector *connector,
|
||||
u32 level, u32 max);
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ static void intel_dsi_hot_plug(struct intel_encoder *encoder)
|
|||
}
|
||||
|
||||
static bool intel_dsi_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *config)
|
||||
struct intel_crtc_state *config)
|
||||
{
|
||||
struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
|
||||
base);
|
||||
|
|
@ -437,7 +437,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_dsi_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
u32 pclk;
|
||||
DRM_DEBUG_KMS("\n");
|
||||
|
|
|
|||
|
|
@ -144,7 +144,7 @@ static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_dvo_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
|
||||
struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
|
||||
|
|
@ -200,7 +200,7 @@ static void intel_dvo_dpms(struct drm_connector *connector, int mode)
|
|||
{
|
||||
struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
|
||||
struct drm_crtc *crtc;
|
||||
struct intel_crtc_config *config;
|
||||
struct intel_crtc_state *config;
|
||||
|
||||
/* dvo supports only 2 dpms states. */
|
||||
if (mode != DRM_MODE_DPMS_ON)
|
||||
|
|
@ -261,7 +261,7 @@ intel_dvo_mode_valid(struct drm_connector *connector,
|
|||
}
|
||||
|
||||
static bool intel_dvo_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
|
||||
struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
|
||||
|
|
|
|||
|
|
@ -759,7 +759,7 @@ static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_hdmi_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
|
|
@ -975,7 +975,7 @@ static bool hdmi_12bpc_possible(struct intel_crtc *crtc)
|
|||
}
|
||||
|
||||
bool intel_hdmi_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_lvds_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -277,7 +277,7 @@ intel_lvds_mode_valid(struct drm_connector *connector,
|
|||
}
|
||||
|
||||
static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = intel_encoder->base.dev;
|
||||
struct intel_lvds_encoder *lvds_encoder =
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ intel_find_panel_downclock(struct drm_device *dev,
|
|||
/* adjusted_mode has been preset to be the panel's fixed mode */
|
||||
void
|
||||
intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
int fitting_mode)
|
||||
{
|
||||
struct drm_display_mode *adjusted_mode;
|
||||
|
|
@ -223,7 +223,7 @@ static inline u32 panel_fitter_scaling(u32 source, u32 target)
|
|||
return (FACTOR * ratio + FACTOR/2) / FACTOR;
|
||||
}
|
||||
|
||||
static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
|
||||
static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
|
||||
u32 *pfit_control)
|
||||
{
|
||||
struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
|
||||
|
|
@ -243,7 +243,7 @@ static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
|
|||
*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
|
||||
}
|
||||
|
||||
static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
|
||||
static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
|
||||
u32 *pfit_control, u32 *pfit_pgm_ratios,
|
||||
u32 *border)
|
||||
{
|
||||
|
|
@ -301,7 +301,7 @@ static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
|
|||
}
|
||||
|
||||
void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_config *pipe_config,
|
||||
struct intel_crtc_state *pipe_config,
|
||||
int fitting_mode)
|
||||
{
|
||||
struct drm_device *dev = intel_crtc->base.dev;
|
||||
|
|
|
|||
|
|
@ -2556,7 +2556,7 @@ skl_allocate_pipe_ddb(struct drm_crtc *crtc,
|
|||
|
||||
}
|
||||
|
||||
static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_config *config)
|
||||
static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config)
|
||||
{
|
||||
/* TODO: Take into account the scalers once we support them */
|
||||
return config->adjusted_mode.crtc_clock;
|
||||
|
|
|
|||
|
|
@ -1085,7 +1085,7 @@ intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
|
|||
return true;
|
||||
}
|
||||
|
||||
static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
|
||||
static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
unsigned dotclock = pipe_config->port_clock;
|
||||
struct dpll *clock = &pipe_config->dpll;
|
||||
|
|
@ -1112,7 +1112,7 @@ static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
|
|||
}
|
||||
|
||||
static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
|
||||
struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
|
||||
|
|
@ -1338,7 +1338,7 @@ static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
|
|||
}
|
||||
|
||||
static void intel_sdvo_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct drm_device *dev = encoder->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
|
|||
|
|
@ -908,14 +908,14 @@ intel_tv_mode_valid(struct drm_connector *connector,
|
|||
|
||||
static void
|
||||
intel_tv_get_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
|
||||
}
|
||||
|
||||
static bool
|
||||
intel_tv_compute_config(struct intel_encoder *encoder,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
struct intel_crtc_state *pipe_config)
|
||||
{
|
||||
struct intel_tv *intel_tv = enc_to_tv(encoder);
|
||||
const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
|
||||
|
|
|
|||
Loading…
Reference in a new issue