diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 6f6752a2ea36..6c3af9486153 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -115,6 +115,9 @@ static inline void arch_acpi_set_proc_cap_bits(u32 *cap)
 	if (cpu_has(c, X86_FEATURE_ACPI))
 		*cap |= ACPI_PROC_CAP_T_FFH;
 
+	if (cpu_has(c, X86_FEATURE_HWP))
+		*cap |= ACPI_PROC_CAP_COLLAB_PROC_PERF;
+
 	/*
 	 * If mwait/monitor is unsupported, C_C1_FFH and
 	 * C2/C3_FFH will be disabled.
diff --git a/drivers/acpi/acpi_processor.c b/drivers/acpi/acpi_processor.c
index ebb4efd3d0aa..163bd3d52acd 100644
--- a/drivers/acpi/acpi_processor.c
+++ b/drivers/acpi/acpi_processor.c
@@ -559,13 +559,41 @@ bool __init processor_physically_present(acpi_handle handle)
 	return !invalid_logical_cpuid(cpuid);
 }
 
+/* vendor specific UUID indicating an Intel platform */
+static u8 sb_uuid_str[] = "4077A616-290C-47BE-9EBD-D87058713953";
 static bool acpi_hwp_native_thermal_lvt_set;
+
+static acpi_status __init acpi_processor_osc(acpi_handle handle, u32 lvl,
+					     void *context, void **rv)
+{
+	u32 capbuf[2] = {};
+	struct acpi_osc_context osc_context = {
+		.uuid_str = sb_uuid_str,
+		.rev = 1,
+		.cap.length = 8,
+		.cap.pointer = capbuf,
+	};
+	acpi_status status;
+
+	if (!processor_physically_present(handle))
+		return AE_OK;
+
+	arch_acpi_set_proc_cap_bits(&capbuf[OSC_SUPPORT_DWORD]);
+
+	status = acpi_run_osc(handle, &osc_context);
+	if (ACPI_FAILURE(status))
+		return status;
+
+	kfree(osc_context.ret.pointer);
+
+	return AE_OK;
+}
+
 static acpi_status __init acpi_hwp_native_thermal_lvt_osc(acpi_handle handle,
 							  u32 lvl,
 							  void *context,
 							  void **rv)
 {
-	u8 sb_uuid_str[] = "4077A616-290C-47BE-9EBD-D87058713953";
 	u32 capbuf[2];
 	struct acpi_osc_context osc_context = {
 		.uuid_str = sb_uuid_str,
diff --git a/include/acpi/proc_cap_intel.h b/include/acpi/proc_cap_intel.h
index 57e5e2628abb..ddcdc41d6c3e 100644
--- a/include/acpi/proc_cap_intel.h
+++ b/include/acpi/proc_cap_intel.h
@@ -19,6 +19,7 @@
 #define ACPI_PROC_CAP_C_C1_FFH			(0x0100)
 #define ACPI_PROC_CAP_C_C2C3_FFH		(0x0200)
 #define ACPI_PROC_CAP_SMP_P_HWCOORD		(0x0800)
+#define ACPI_PROC_CAP_COLLAB_PROC_PERF		(0x1000)
 
 #define ACPI_PROC_CAP_EST_CAPABILITY_SMP	(ACPI_PROC_CAP_SMP_C1PT | \
 						 ACPI_PROC_CAP_C_C1_HALT | \