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KVM: SVM: Add support for CR4 write traps for an SEV-ES guest
For SEV-ES guests, the interception of control register write access is not recommended. Control register interception occurs prior to the control register being modified and the hypervisor is unable to modify the control register itself because the register is located in the encrypted register state. SEV-ES guests introduce new control register write traps. These traps provide intercept support of a control register write after the control register has been modified. The new control register value is provided in the VMCB EXITINFO1 field, allowing the hypervisor to track the setting of the guest control registers. Add support to track the value of the guest CR4 register using the control register write trap so that the hypervisor understands the guest operating mode. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <c3880bf2db8693aa26f648528fbc6e967ab46e25.1607620209.git.thomas.lendacky@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1478,6 +1478,7 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
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int reason, bool has_error_code, u32 error_code);
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int reason, bool has_error_code, u32 error_code);
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void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
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void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
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void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
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int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
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int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
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int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
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int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
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@ -203,6 +203,7 @@
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{ SVM_EXIT_XSETBV, "xsetbv" }, \
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{ SVM_EXIT_XSETBV, "xsetbv" }, \
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{ SVM_EXIT_EFER_WRITE_TRAP, "write_efer_trap" }, \
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{ SVM_EXIT_EFER_WRITE_TRAP, "write_efer_trap" }, \
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{ SVM_EXIT_CR0_WRITE_TRAP, "write_cr0_trap" }, \
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{ SVM_EXIT_CR0_WRITE_TRAP, "write_cr0_trap" }, \
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{ SVM_EXIT_CR4_WRITE_TRAP, "write_cr4_trap" }, \
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{ SVM_EXIT_INVPCID, "invpcid" }, \
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{ SVM_EXIT_INVPCID, "invpcid" }, \
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{ SVM_EXIT_NPF, "npf" }, \
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{ SVM_EXIT_NPF, "npf" }, \
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{ SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \
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{ SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \
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@ -2466,6 +2466,12 @@ static int cr_trap(struct vcpu_svm *svm)
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kvm_post_set_cr0(vcpu, old_value, new_value);
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kvm_post_set_cr0(vcpu, old_value, new_value);
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break;
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break;
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case 4:
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old_value = kvm_read_cr4(vcpu);
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svm_set_cr4(vcpu, new_value);
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kvm_post_set_cr4(vcpu, old_value, new_value);
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break;
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default:
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default:
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WARN(1, "unhandled CR%d write trap", cr);
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WARN(1, "unhandled CR%d write trap", cr);
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kvm_queue_exception(vcpu, UD_VECTOR);
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kvm_queue_exception(vcpu, UD_VECTOR);
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@ -3023,6 +3029,7 @@ static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = {
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[SVM_EXIT_RDPRU] = rdpru_interception,
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[SVM_EXIT_RDPRU] = rdpru_interception,
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[SVM_EXIT_EFER_WRITE_TRAP] = efer_trap,
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[SVM_EXIT_EFER_WRITE_TRAP] = efer_trap,
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[SVM_EXIT_CR0_WRITE_TRAP] = cr_trap,
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[SVM_EXIT_CR0_WRITE_TRAP] = cr_trap,
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[SVM_EXIT_CR4_WRITE_TRAP] = cr_trap,
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[SVM_EXIT_INVPCID] = invpcid_interception,
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[SVM_EXIT_INVPCID] = invpcid_interception,
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[SVM_EXIT_NPF] = npf_interception,
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[SVM_EXIT_NPF] = npf_interception,
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[SVM_EXIT_RSM] = rsm_interception,
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[SVM_EXIT_RSM] = rsm_interception,
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@ -983,12 +983,22 @@ bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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}
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}
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EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
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EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
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void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
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{
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unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
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X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
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if (((cr4 ^ old_cr4) & mmu_role_bits) ||
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(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
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kvm_mmu_reset_context(vcpu);
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}
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EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
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int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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{
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unsigned long old_cr4 = kvm_read_cr4(vcpu);
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unsigned long old_cr4 = kvm_read_cr4(vcpu);
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unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
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unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
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X86_CR4_SMEP;
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X86_CR4_SMEP;
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unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
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if (!kvm_is_valid_cr4(vcpu, cr4))
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if (!kvm_is_valid_cr4(vcpu, cr4))
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return 1;
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return 1;
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@ -1015,9 +1025,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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kvm_x86_ops.set_cr4(vcpu, cr4);
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kvm_x86_ops.set_cr4(vcpu, cr4);
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if (((cr4 ^ old_cr4) & mmu_role_bits) ||
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kvm_post_set_cr4(vcpu, old_cr4, cr4);
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(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
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kvm_mmu_reset_context(vcpu);
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return 0;
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return 0;
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}
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}
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