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powerpc/fsl_msi: change the irq handler from chained to normal
As we do for other fsl-mpic related cascaded irqchips (e.g. error ints, mpic timers), use a normal irq handler for msi irqs too. This brings some advantages such as mask/unmask/ack/eoi and irq state taken care behind the scenes, kstats updates a.s.o plus access to features provided by mpic, such as affinity. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -18,6 +18,7 @@
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/of_platform.h>
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#include <linux/interrupt.h>
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#include <sysdev/fsl_soc.h>
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#include <asm/prom.h>
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#include <asm/hw_irq.h>
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@ -241,40 +242,24 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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return rc;
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}
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static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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static irqreturn_t fsl_msi_cascade(int irq, void *data)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct irq_data *idata = irq_desc_get_irq_data(desc);
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unsigned int cascade_irq;
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struct fsl_msi *msi_data;
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int msir_index = -1;
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u32 msir_value = 0;
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u32 intr_index;
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u32 have_shift = 0;
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struct fsl_msi_cascade_data *cascade_data;
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struct fsl_msi_cascade_data *cascade_data = data;
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irqreturn_t ret = IRQ_NONE;
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cascade_data = irq_get_handler_data(irq);
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msi_data = cascade_data->msi_data;
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raw_spin_lock(&desc->lock);
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if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
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if (chip->irq_mask_ack)
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chip->irq_mask_ack(idata);
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else {
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chip->irq_mask(idata);
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chip->irq_ack(idata);
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}
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}
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if (unlikely(irqd_irq_inprogress(idata)))
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goto unlock;
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msir_index = cascade_data->index;
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if (msir_index >= NR_MSI_REG_MAX)
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cascade_irq = NO_IRQ;
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irqd_set_chained_irq_inprogress(idata);
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switch (msi_data->feature & FSL_PIC_IP_MASK) {
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case FSL_PIC_IP_MPIC:
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msir_value = fsl_msi_read(msi_data->msi_regs,
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@ -303,25 +288,15 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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cascade_irq = irq_linear_revmap(msi_data->irqhost,
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msi_hwirq(msi_data, msir_index,
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intr_index + have_shift));
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if (cascade_irq != NO_IRQ)
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if (cascade_irq != NO_IRQ) {
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generic_handle_irq(cascade_irq);
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ret = IRQ_HANDLED;
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}
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have_shift += intr_index + 1;
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msir_value = msir_value >> (intr_index + 1);
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}
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irqd_clr_chained_irq_inprogress(idata);
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switch (msi_data->feature & FSL_PIC_IP_MASK) {
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case FSL_PIC_IP_MPIC:
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case FSL_PIC_IP_VMPIC:
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chip->irq_eoi(idata);
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break;
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case FSL_PIC_IP_IPIC:
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if (!irqd_irq_disabled(idata) && chip->irq_unmask)
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chip->irq_unmask(idata);
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break;
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}
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unlock:
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raw_spin_unlock(&desc->lock);
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return ret;
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}
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static int fsl_of_msi_remove(struct platform_device *ofdev)
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@ -336,9 +311,8 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
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virq = msi->cascade_array[i]->virq;
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BUG_ON(virq == NO_IRQ);
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BUG_ON(msi->cascade_array[i] !=
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irq_get_handler_data(virq));
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free_irq(virq, msi->cascade_array[i]);
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kfree(msi->cascade_array[i]);
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irq_dispose_mapping(virq);
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}
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@ -358,7 +332,7 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
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int offset, int irq_index)
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{
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struct fsl_msi_cascade_data *cascade_data = NULL;
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int virt_msir, i;
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int virt_msir, i, ret;
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virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
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if (virt_msir == NO_IRQ) {
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@ -377,8 +351,14 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
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cascade_data->msi_data = msi;
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cascade_data->virq = virt_msir;
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msi->cascade_array[irq_index] = cascade_data;
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irq_set_handler_data(virt_msir, cascade_data);
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irq_set_chained_handler(virt_msir, fsl_msi_cascade);
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ret = request_irq(virt_msir, fsl_msi_cascade, 0,
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"fsl-msi-cascade", cascade_data);
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if (ret) {
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dev_err(&dev->dev, "failed to request_irq(%d), ret = %d\n",
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virt_msir, ret);
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return ret;
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}
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/* Release the hwirqs corresponding to this MSI register */
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for (i = 0; i < IRQS_PER_MSI_REG; i++)
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