soundwire: mipi-disco: fix clock stop modes

Fix support for clock_stop_mode0 and 1. The existing code uses a
bitmask between enums, one of which being zero. Or-ing with zero is
not very useful in general...Fix by or-ing with a BIT dependent on the
enum value.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Pierre-Louis Bossart 2019-05-22 14:47:23 -05:00 committed by Vinod Koul
parent 3424305b8b
commit 53d2e9c377
2 changed files with 4 additions and 4 deletions

View file

@ -50,11 +50,11 @@ int sdw_master_read_prop(struct sdw_bus *bus)
if (fwnode_property_read_bool(link,
"mipi-sdw-clock-stop-mode0-supported"))
prop->clk_stop_mode = SDW_CLK_STOP_MODE0;
prop->clk_stop_modes |= BIT(SDW_CLK_STOP_MODE0);
if (fwnode_property_read_bool(link,
"mipi-sdw-clock-stop-mode1-supported"))
prop->clk_stop_mode |= SDW_CLK_STOP_MODE1;
prop->clk_stop_modes |= BIT(SDW_CLK_STOP_MODE1);
fwnode_property_read_u32(link,
"mipi-sdw-max-clock-frequency",

View file

@ -364,7 +364,7 @@ struct sdw_slave_prop {
/**
* struct sdw_master_prop - Master properties
* @revision: MIPI spec version of the implementation
* @clk_stop_mode: Bitmap for Clock Stop modes supported
* @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
* @max_clk_freq: Maximum Bus clock frequency, in Hz
* @num_clk_gears: Number of clock gears supported
* @clk_gears: Clock gears supported
@ -379,7 +379,7 @@ struct sdw_slave_prop {
*/
struct sdw_master_prop {
u32 revision;
enum sdw_clk_stop_mode clk_stop_mode;
u32 clk_stop_modes;
u32 max_clk_freq;
u32 num_clk_gears;
u32 *clk_gears;