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qlcnic: 83xx register dump routines

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Add 83xx register dump routines
Update 82xx register dump routines

Signed-off-by: Anirban Chakraborty <anirban.chakraborty@qlogic.com>
Signed-off-by: Rajesh Borundia <rajesh.borundia@qlogic.com>
Signed-off-by: Sritej Velaga <sritej.velaga@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sony Chacko 2013-01-01 03:20:27 +00:00 committed by David S. Miller
parent d71170fb9d
commit 4e60ac4641
6 changed files with 529 additions and 155 deletions
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3
drivers/net/ethernet/qlogic/qlcnic/Makefile
View file

@ -7,4 +7,5 @@ obj-$(CONFIG_QLCNIC) := qlcnic.o
qlcnic-y := qlcnic_hw.o qlcnic_main.o qlcnic_init.o \
qlcnic_ethtool.o qlcnic_ctx.o qlcnic_io.o \
qlcnic_sysfs.o qlcnic_minidump.o qlcnic_83xx_hw.o \
qlcnic_83xx_init.o qlcnic_83xx_vnic.o
qlcnic_83xx_init.o qlcnic_83xx_vnic.o \
qlcnic_minidump.o

1
drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
View file

@ -375,6 +375,7 @@ struct qlcnic_dump_template_hdr {
u32 sys_info[3];
u32 saved_state[16];
u32 cap_sizes[8];
u32 ocm_wnd_reg[16];
u32 rsvd[0];
};

2
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h
View file

@ -407,4 +407,6 @@ int qlcnic_83xx_config_vnic_opmode(struct qlcnic_adapter *);
int qlcnic_83xx_get_vnic_vport_info(struct qlcnic_adapter *,
struct qlcnic_info *, u8);
int qlcnic_83xx_get_vnic_pf_info(struct qlcnic_adapter *, struct qlcnic_info *);
void qlcnic_83xx_get_minidump_template(struct qlcnic_adapter *);
#endif

7
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
View file

@ -1850,9 +1850,15 @@ static int qlcnic_83xx_load_fw_image_from_host(struct qlcnic_adapter *adapter)
static int qlcnic_83xx_restart_hw(struct qlcnic_adapter *adapter)
{
u32 val;
int err = -EIO;
qlcnic_83xx_stop_hw(adapter);
/* Collect FW register dump if required */
val = QLCRDX(adapter->ahw, QLC_83XX_IDC_CTRL);
if (!(val & QLC_83XX_IDC_GRACEFULL_RESET))
qlcnic_dump_fw(adapter);
qlcnic_83xx_init_hw(adapter);
if (qlcnic_83xx_copy_bootloader(adapter))
@ -1970,6 +1976,7 @@ static int qlcnic_83xx_init_default_driver(struct qlcnic_adapter *adapter)
{
int err = -EIO;
qlcnic_83xx_get_minidump_template(adapter);
if (qlcnic_83xx_get_port_info(adapter))
return err;

34
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c
View file

@ -160,40 +160,6 @@ int qlcnic_82xx_issue_cmd(struct qlcnic_adapter *adapter,
return cmd->rsp.arg[0];
}
int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
{
int err = 0;
void *tmp_addr;
struct qlcnic_cmd_args cmd;
dma_addr_t tmp_addr_t = 0;
tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, 0x1000,
&tmp_addr_t, GFP_KERNEL);
if (!tmp_addr) {
dev_err(&adapter->pdev->dev,
"Can't get memory for FW dump template\n");
return -ENOMEM;
}
if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_TEMP_HDR)) {
err = -ENOMEM;
goto free_mem;
}
cmd.req.arg[1] = LSD(tmp_addr_t);
cmd.req.arg[2] = MSD(tmp_addr_t);
cmd.req.arg[3] = 0x1000;
err = qlcnic_issue_cmd(adapter, &cmd);
qlcnic_free_mbx_args(&cmd);
free_mem:
dma_free_coherent(&adapter->pdev->dev, 0x1000, tmp_addr, tmp_addr_t);
return err;
}
int
qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
{

637
drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c
View file

@ -1,8 +1,19 @@
#include "qlcnic.h"
#include "qlcnic_hdr.h"
#include "qlcnic_83xx_hw.h"
#include "qlcnic_hw.h"
#include <net/ip.h>
#define QLC_83XX_MINIDUMP_FLASH 0x520000
#define QLC_83XX_OCM_INDEX 3
#define QLC_83XX_PCI_INDEX 0
static const u32 qlcnic_ms_read_data[] = {
0x410000A8, 0x410000AC, 0x410000B8, 0x410000BC
};
#define QLCNIC_DUMP_WCRB BIT_0
#define QLCNIC_DUMP_RWCRB BIT_1
#define QLCNIC_DUMP_ANDCRB BIT_2
@ -102,16 +113,55 @@ struct __queue {
u8 rsvd3[2];
} __packed;
struct __pollrd {
u32 sel_addr;
u32 read_addr;
u32 sel_val;
u16 sel_val_stride;
u16 no_ops;
u32 poll_wait;
u32 poll_mask;
u32 data_size;
u8 rsvd[4];
} __packed;
struct __mux2 {
u32 sel_addr1;
u32 sel_addr2;
u32 sel_val1;
u32 sel_val2;
u32 no_ops;
u32 sel_val_mask;
u32 read_addr;
u8 sel_val_stride;
u8 data_size;
u8 rsvd[2];
} __packed;
struct __pollrdmwr {
u32 addr1;
u32 addr2;
u32 val1;
u32 val2;
u32 poll_wait;
u32 poll_mask;
u32 mod_mask;
u32 data_size;
} __packed;
struct qlcnic_dump_entry {
struct qlcnic_common_entry_hdr hdr;
union {
struct __crb crb;
struct __cache cache;
struct __ocm ocm;
struct __mem mem;
struct __mux mux;
struct __queue que;
struct __ctrl ctrl;
struct __crb crb;
struct __cache cache;
struct __ocm ocm;
struct __mem mem;
struct __mux mux;
struct __queue que;
struct __ctrl ctrl;
struct __pollrdmwr pollrdmwr;
struct __mux2 mux2;
struct __pollrd pollrd;
} region;
} __packed;
@ -131,6 +181,9 @@ enum qlcnic_minidump_opcode {
QLCNIC_DUMP_L2_ITAG = 22,
QLCNIC_DUMP_L2_DATA = 23,
QLCNIC_DUMP_L2_INST = 24,
QLCNIC_DUMP_POLL_RD = 35,
QLCNIC_READ_MUX2 = 36,
QLCNIC_READ_POLLRDMWR = 37,
QLCNIC_DUMP_READ_ROM = 71,
QLCNIC_DUMP_READ_MEM = 72,
QLCNIC_DUMP_READ_CTRL = 98,
@ -144,46 +197,17 @@ struct qlcnic_dump_operations {
__le32 *);
};
static void qlcnic_read_dump_reg(u32 addr, void __iomem *bar0, u32 *data)
{
u32 dest;
void __iomem *window_reg;
dest = addr & 0xFFFF0000;
window_reg = bar0 + QLCNIC_FW_DUMP_REG1;
writel(dest, window_reg);
readl(window_reg);
window_reg = bar0 + QLCNIC_FW_DUMP_REG2 + LSW(addr);
*data = readl(window_reg);
}
static void qlcnic_write_dump_reg(u32 addr, void __iomem *bar0, u32 data)
{
u32 dest;
void __iomem *window_reg;
dest = addr & 0xFFFF0000;
window_reg = bar0 + QLCNIC_FW_DUMP_REG1;
writel(dest, window_reg);
readl(window_reg);
window_reg = bar0 + QLCNIC_FW_DUMP_REG2 + LSW(addr);
writel(data, window_reg);
readl(window_reg);
}
/* FW dump related functions */
static u32 qlcnic_dump_crb(struct qlcnic_adapter *adapter,
struct qlcnic_dump_entry *entry, __le32 *buffer)
{
int i;
u32 addr, data;
struct __crb *crb = &entry->region.crb;
void __iomem *base = adapter->ahw->pci_base0;
addr = crb->addr;
for (i = 0; i < crb->no_ops; i++) {
qlcnic_read_dump_reg(addr, base, &data);
data = qlcnic_ind_rd(adapter, addr);
*buffer++ = cpu_to_le32(addr);
*buffer++ = cpu_to_le32(data);
addr += crb->stride;
@ -195,7 +219,6 @@ static u32 qlcnic_dump_ctrl(struct qlcnic_adapter *adapter,
struct qlcnic_dump_entry *entry, __le32 *buffer)
{
int i, k, timeout = 0;
void __iomem *base = adapter->ahw->pci_base0;
u32 addr, data;
u8 no_ops;
struct __ctrl *ctr = &entry->region.ctrl;
@ -211,28 +234,28 @@ static u32 qlcnic_dump_ctrl(struct qlcnic_adapter *adapter,
continue;
switch (1 << k) {
case QLCNIC_DUMP_WCRB:
qlcnic_write_dump_reg(addr, base, ctr->val1);
qlcnic_ind_wr(adapter, addr, ctr->val1);
break;
case QLCNIC_DUMP_RWCRB:
qlcnic_read_dump_reg(addr, base, &data);
qlcnic_write_dump_reg(addr, base, data);
data = qlcnic_ind_rd(adapter, addr);
qlcnic_ind_wr(adapter, addr, data);
break;
case QLCNIC_DUMP_ANDCRB:
qlcnic_read_dump_reg(addr, base, &data);
qlcnic_write_dump_reg(addr, base,
data & ctr->val2);
data = qlcnic_ind_rd(adapter, addr);
qlcnic_ind_wr(adapter, addr,
(data & ctr->val2));
break;
case QLCNIC_DUMP_ORCRB:
qlcnic_read_dump_reg(addr, base, &data);
qlcnic_write_dump_reg(addr, base,
data | ctr->val3);
data = qlcnic_ind_rd(adapter, addr);
qlcnic_ind_wr(adapter, addr,
(data | ctr->val3));
break;
case QLCNIC_DUMP_POLLCRB:
while (timeout <= ctr->timeout) {
qlcnic_read_dump_reg(addr, base, &data);
data = qlcnic_ind_rd(adapter, addr);
if ((data & ctr->val2) == ctr->val1)
break;
msleep(1);
usleep_range(1000, 2000);
timeout++;
}
if (timeout > ctr->timeout) {
@ -244,7 +267,7 @@ static u32 qlcnic_dump_ctrl(struct qlcnic_adapter *adapter,
case QLCNIC_DUMP_RD_SAVE:
if (ctr->index_a)
addr = t_hdr->saved_state[ctr->index_a];
qlcnic_read_dump_reg(addr, base, &data);
data = qlcnic_ind_rd(adapter, addr);
t_hdr->saved_state[ctr->index_v] = data;
break;
case QLCNIC_DUMP_WRT_SAVED:
@ -254,7 +277,7 @@ static u32 qlcnic_dump_ctrl(struct qlcnic_adapter *adapter,
data = ctr->val1;
if (ctr->index_a)
addr = t_hdr->saved_state[ctr->index_a];
qlcnic_write_dump_reg(addr, base, data);
qlcnic_ind_wr(adapter, addr, data);
break;
case QLCNIC_DUMP_MOD_SAVE_ST:
data = t_hdr->saved_state[ctr->index_v];
@ -283,12 +306,11 @@ static u32 qlcnic_dump_mux(struct qlcnic_adapter *adapter,
int loop;
u32 val, data = 0;
struct __mux *mux = &entry->region.mux;
void __iomem *base = adapter->ahw->pci_base0;
val = mux->val;
for (loop = 0; loop < mux->no_ops; loop++) {
qlcnic_write_dump_reg(mux->addr, base, val);
qlcnic_read_dump_reg(mux->read_addr, base, &data);
qlcnic_ind_wr(adapter, mux->addr, val);
data = qlcnic_ind_rd(adapter, mux->read_addr);
*buffer++ = cpu_to_le32(val);
*buffer++ = cpu_to_le32(data);
val += mux->val_stride;
@ -301,17 +323,16 @@ static u32 qlcnic_dump_que(struct qlcnic_adapter *adapter,
{
int i, loop;
u32 cnt, addr, data, que_id = 0;
void __iomem *base = adapter->ahw->pci_base0;
struct __queue *que = &entry->region.que;
addr = que->read_addr;
cnt = que->read_addr_cnt;
for (loop = 0; loop < que->no_ops; loop++) {
qlcnic_write_dump_reg(que->sel_addr, base, que_id);
qlcnic_ind_wr(adapter, que->sel_addr, que_id);
addr = que->read_addr;
for (i = 0; i < cnt; i++) {
qlcnic_read_dump_reg(addr, base, &data);
data = qlcnic_ind_rd(adapter, addr);
*buffer++ = cpu_to_le32(data);
addr += que->read_addr_stride;
}
@ -343,27 +364,27 @@ static u32 qlcnic_read_rom(struct qlcnic_adapter *adapter,
int i, count = 0;
u32 fl_addr, size, val, lck_val, addr;
struct __mem *rom = &entry->region.mem;
void __iomem *base = adapter->ahw->pci_base0;
fl_addr = rom->addr;
size = rom->size/4;
size = rom->size / 4;
lock_try:
lck_val = readl(base + QLCNIC_FLASH_SEM2_LK);
lck_val = QLC_SHARED_REG_RD32(adapter, QLCNIC_FLASH_LOCK);
if (!lck_val && count < MAX_CTL_CHECK) {
msleep(10);
usleep_range(10000, 11000);
count++;
goto lock_try;
}
writel(adapter->ahw->pci_func, (base + QLCNIC_FLASH_LOCK_ID));
QLC_SHARED_REG_WR32(adapter, QLCNIC_FLASH_LOCK_OWNER,
adapter->ahw->pci_func);
for (i = 0; i < size; i++) {
addr = fl_addr & 0xFFFF0000;
qlcnic_write_dump_reg(FLASH_ROM_WINDOW, base, addr);
qlcnic_ind_wr(adapter, FLASH_ROM_WINDOW, addr);
addr = LSW(fl_addr) + FLASH_ROM_DATA;
qlcnic_read_dump_reg(addr, base, &val);
val = qlcnic_ind_rd(adapter, addr);
fl_addr += 4;
*buffer++ = cpu_to_le32(val);
}
readl(base + QLCNIC_FLASH_SEM2_ULK);
QLC_SHARED_REG_RD32(adapter, QLCNIC_FLASH_UNLOCK);
return rom->size;
}
@ -372,18 +393,17 @@ static u32 qlcnic_dump_l1_cache(struct qlcnic_adapter *adapter,
{
int i;
u32 cnt, val, data, addr;
void __iomem *base = adapter->ahw->pci_base0;
struct __cache *l1 = &entry->region.cache;
val = l1->init_tag_val;
for (i = 0; i < l1->no_ops; i++) {
qlcnic_write_dump_reg(l1->addr, base, val);
qlcnic_write_dump_reg(l1->ctrl_addr, base, LSW(l1->ctrl_val));
qlcnic_ind_wr(adapter, l1->addr, val);
qlcnic_ind_wr(adapter, l1->ctrl_addr, LSW(l1->ctrl_val));
addr = l1->read_addr;
cnt = l1->read_addr_num;
while (cnt) {
qlcnic_read_dump_reg(addr, base, &data);
data = qlcnic_ind_rd(adapter, addr);
*buffer++ = cpu_to_le32(data);
addr += l1->read_addr_stride;
cnt--;
@ -399,7 +419,6 @@ static u32 qlcnic_dump_l2_cache(struct qlcnic_adapter *adapter,
int i;
u32 cnt, val, data, addr;
u8 poll_mask, poll_to, time_out = 0;
void __iomem *base = adapter->ahw->pci_base0;
struct __cache *l2 = &entry->region.cache;
val = l2->init_tag_val;
@ -407,17 +426,17 @@ static u32 qlcnic_dump_l2_cache(struct qlcnic_adapter *adapter,
poll_to = MSB(MSW(l2->ctrl_val));
for (i = 0; i < l2->no_ops; i++) {
qlcnic_write_dump_reg(l2->addr, base, val);
qlcnic_ind_wr(adapter, l2->addr, val);
if (LSW(l2->ctrl_val))
qlcnic_write_dump_reg(l2->ctrl_addr, base,
LSW(l2->ctrl_val));
qlcnic_ind_wr(adapter, l2->ctrl_addr,
LSW(l2->ctrl_val));
if (!poll_mask)
goto skip_poll;
do {
qlcnic_read_dump_reg(l2->ctrl_addr, base, &data);
data = qlcnic_ind_rd(adapter, l2->ctrl_addr);
if (!(data & poll_mask))
break;
msleep(1);
usleep_range(1000, 2000);
time_out++;
} while (time_out <= poll_to);
@ -431,7 +450,7 @@ static u32 qlcnic_dump_l2_cache(struct qlcnic_adapter *adapter,
addr = l2->read_addr;
cnt = l2->read_addr_num;
while (cnt) {
qlcnic_read_dump_reg(addr, base, &data);
data = qlcnic_ind_rd(adapter, addr);
*buffer++ = cpu_to_le32(data);
addr += l2->read_addr_stride;
cnt--;
@ -447,7 +466,6 @@ static u32 qlcnic_read_memory(struct qlcnic_adapter *adapter,
u32 addr, data, test, ret = 0;
int i, reg_read;
struct __mem *mem = &entry->region.mem;
void __iomem *base = adapter->ahw->pci_base0;
reg_read = mem->size;
addr = mem->addr;
@ -462,13 +480,12 @@ static u32 qlcnic_read_memory(struct qlcnic_adapter *adapter,
mutex_lock(&adapter->ahw->mem_lock);
while (reg_read != 0) {
qlcnic_write_dump_reg(MIU_TEST_ADDR_LO, base, addr);
qlcnic_write_dump_reg(MIU_TEST_ADDR_HI, base, 0);
qlcnic_write_dump_reg(MIU_TEST_CTR, base,
TA_CTL_ENABLE | TA_CTL_START);
qlcnic_ind_wr(adapter, QLCNIC_MS_ADDR_LO, addr);
qlcnic_ind_wr(adapter, QLCNIC_MS_ADDR_HI, 0);
qlcnic_ind_wr(adapter, QLCNIC_MS_CTRL, QLCNIC_TA_START_ENABLE);
for (i = 0; i < MAX_CTL_CHECK; i++) {
qlcnic_read_dump_reg(MIU_TEST_CTR, base, &test);
test = qlcnic_ind_rd(adapter, QLCNIC_MS_CTRL);
if (!(test & TA_CTL_BUSY))
break;
}
@ -481,8 +498,7 @@ static u32 qlcnic_read_memory(struct qlcnic_adapter *adapter,
}
}
for (i = 0; i < 4; i++) {
qlcnic_read_dump_reg(MIU_TEST_READ_DATA[i], base,
&data);
data = qlcnic_ind_rd(adapter, qlcnic_ms_read_data[i]);
*buffer++ = cpu_to_le32(data);
}
addr += 16;
@ -501,48 +517,388 @@ static u32 qlcnic_dump_nop(struct qlcnic_adapter *adapter,
return 0;
}
static const struct qlcnic_dump_operations fw_dump_ops[] = {
{ QLCNIC_DUMP_NOP, qlcnic_dump_nop },
{ QLCNIC_DUMP_READ_CRB, qlcnic_dump_crb },
{ QLCNIC_DUMP_READ_MUX, qlcnic_dump_mux },
{ QLCNIC_DUMP_QUEUE, qlcnic_dump_que },
{ QLCNIC_DUMP_BRD_CONFIG, qlcnic_read_rom },
{ QLCNIC_DUMP_READ_OCM, qlcnic_dump_ocm },
{ QLCNIC_DUMP_PEG_REG, qlcnic_dump_ctrl },
{ QLCNIC_DUMP_L1_DTAG, qlcnic_dump_l1_cache },
{ QLCNIC_DUMP_L1_ITAG, qlcnic_dump_l1_cache },
{ QLCNIC_DUMP_L1_DATA, qlcnic_dump_l1_cache },
{ QLCNIC_DUMP_L1_INST, qlcnic_dump_l1_cache },
{ QLCNIC_DUMP_L2_DTAG, qlcnic_dump_l2_cache },
{ QLCNIC_DUMP_L2_ITAG, qlcnic_dump_l2_cache },
{ QLCNIC_DUMP_L2_DATA, qlcnic_dump_l2_cache },
{ QLCNIC_DUMP_L2_INST, qlcnic_dump_l2_cache },
{ QLCNIC_DUMP_READ_ROM, qlcnic_read_rom },
{ QLCNIC_DUMP_READ_MEM, qlcnic_read_memory },
{ QLCNIC_DUMP_READ_CTRL, qlcnic_dump_ctrl },
{ QLCNIC_DUMP_TLHDR, qlcnic_dump_nop },
{ QLCNIC_DUMP_RDEND, qlcnic_dump_nop },
};
/* Walk the template and collect dump for each entry in the dump template */
static int
qlcnic_valid_dump_entry(struct device *dev, struct qlcnic_dump_entry *entry,
u32 size)
static int qlcnic_valid_dump_entry(struct device *dev,
struct qlcnic_dump_entry *entry, u32 size)
{
int ret = 1;
if (size != entry->hdr.cap_size) {
dev_info(dev,
"Invalid dump, Type:%d\tMask:%d\tSize:%dCap_size:%d\n",
entry->hdr.type, entry->hdr.mask, size, entry->hdr.cap_size);
dev_info(dev, "Aborting further dump capture\n");
dev_err(dev,
"Invalid entry, Type:%d\tMask:%d\tSize:%dCap_size:%d\n",
entry->hdr.type, entry->hdr.mask, size,
entry->hdr.cap_size);
ret = 0;
}
return ret;
}
static u32 qlcnic_read_pollrdmwr(struct qlcnic_adapter *adapter,
struct qlcnic_dump_entry *entry,
__le32 *buffer)
{
struct __pollrdmwr *poll = &entry->region.pollrdmwr;
u32 data, wait_count, poll_wait, temp;
poll_wait = poll->poll_wait;
qlcnic_ind_wr(adapter, poll->addr1, poll->val1);
wait_count = 0;
while (wait_count < poll_wait) {
data = qlcnic_ind_rd(adapter, poll->addr1);
if ((data & poll->poll_mask) != 0)
break;
wait_count++;
}
if (wait_count == poll_wait) {
dev_err(&adapter->pdev->dev,
"Timeout exceeded in %s, aborting dump\n",
__func__);
return 0;
}
data = qlcnic_ind_rd(adapter, poll->addr2) & poll->mod_mask;
qlcnic_ind_wr(adapter, poll->addr2, data);
qlcnic_ind_wr(adapter, poll->addr1, poll->val2);
wait_count = 0;
while (wait_count < poll_wait) {
temp = qlcnic_ind_rd(adapter, poll->addr1);
if ((temp & poll->poll_mask) != 0)
break;
wait_count++;
}
*buffer++ = cpu_to_le32(poll->addr2);
*buffer++ = cpu_to_le32(data);
return 2 * sizeof(u32);
}
static u32 qlcnic_read_pollrd(struct qlcnic_adapter *adapter,
struct qlcnic_dump_entry *entry, __le32 *buffer)
{
struct __pollrd *pollrd = &entry->region.pollrd;
u32 data, wait_count, poll_wait, sel_val;
int i;
poll_wait = pollrd->poll_wait;
sel_val = pollrd->sel_val;
for (i = 0; i < pollrd->no_ops; i++) {
qlcnic_ind_wr(adapter, pollrd->sel_addr, sel_val);
wait_count = 0;
while (wait_count < poll_wait) {
data = qlcnic_ind_rd(adapter, pollrd->sel_addr);
if ((data & pollrd->poll_mask) != 0)
break;
wait_count++;
}
if (wait_count == poll_wait) {
dev_err(&adapter->pdev->dev,
"Timeout exceeded in %s, aborting dump\n",
__func__);
return 0;
}
data = qlcnic_ind_rd(adapter, pollrd->read_addr);
*buffer++ = cpu_to_le32(sel_val);
*buffer++ = cpu_to_le32(data);
sel_val += pollrd->sel_val_stride;
}
return pollrd->no_ops * (2 * sizeof(u32));
}
static u32 qlcnic_read_mux2(struct qlcnic_adapter *adapter,
struct qlcnic_dump_entry *entry, __le32 *buffer)
{
struct __mux2 *mux2 = &entry->region.mux2;
u32 data;
u32 t_sel_val, sel_val1, sel_val2;
int i;
sel_val1 = mux2->sel_val1;
sel_val2 = mux2->sel_val2;
for (i = 0; i < mux2->no_ops; i++) {
qlcnic_ind_wr(adapter, mux2->sel_addr1, sel_val1);
t_sel_val = sel_val1 & mux2->sel_val_mask;
qlcnic_ind_wr(adapter, mux2->sel_addr2, t_sel_val);
data = qlcnic_ind_rd(adapter, mux2->read_addr);
*buffer++ = cpu_to_le32(t_sel_val);
*buffer++ = cpu_to_le32(data);
qlcnic_ind_wr(adapter, mux2->sel_addr1, sel_val2);
t_sel_val = sel_val2 & mux2->sel_val_mask;
qlcnic_ind_wr(adapter, mux2->sel_addr2, t_sel_val);
data = qlcnic_ind_rd(adapter, mux2->read_addr);
*buffer++ = cpu_to_le32(t_sel_val);
*buffer++ = cpu_to_le32(data);
sel_val1 += mux2->sel_val_stride;
sel_val2 += mux2->sel_val_stride;
}
return mux2->no_ops * (4 * sizeof(u32));
}
static u32 qlcnic_83xx_dump_rom(struct qlcnic_adapter *adapter,
struct qlcnic_dump_entry *entry, __le32 *buffer)
{
u32 fl_addr, size;
struct __mem *rom = &entry->region.mem;
fl_addr = rom->addr;
size = rom->size / 4;
if (!qlcnic_83xx_lockless_flash_read32(adapter, fl_addr,
(u8 *)buffer, size))
return rom->size;
return 0;
}
static const struct qlcnic_dump_operations qlcnic_fw_dump_ops[] = {
{QLCNIC_DUMP_NOP, qlcnic_dump_nop},
{QLCNIC_DUMP_READ_CRB, qlcnic_dump_crb},
{QLCNIC_DUMP_READ_MUX, qlcnic_dump_mux},
{QLCNIC_DUMP_QUEUE, qlcnic_dump_que},
{QLCNIC_DUMP_BRD_CONFIG, qlcnic_read_rom},
{QLCNIC_DUMP_READ_OCM, qlcnic_dump_ocm},
{QLCNIC_DUMP_PEG_REG, qlcnic_dump_ctrl},
{QLCNIC_DUMP_L1_DTAG, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L1_ITAG, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L1_DATA, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L1_INST, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L2_DTAG, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_L2_ITAG, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_L2_DATA, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_L2_INST, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_READ_ROM, qlcnic_read_rom},
{QLCNIC_DUMP_READ_MEM, qlcnic_read_memory},
{QLCNIC_DUMP_READ_CTRL, qlcnic_dump_ctrl},
{QLCNIC_DUMP_TLHDR, qlcnic_dump_nop},
{QLCNIC_DUMP_RDEND, qlcnic_dump_nop},
};
static const struct qlcnic_dump_operations qlcnic_83xx_fw_dump_ops[] = {
{QLCNIC_DUMP_NOP, qlcnic_dump_nop},
{QLCNIC_DUMP_READ_CRB, qlcnic_dump_crb},
{QLCNIC_DUMP_READ_MUX, qlcnic_dump_mux},
{QLCNIC_DUMP_QUEUE, qlcnic_dump_que},
{QLCNIC_DUMP_BRD_CONFIG, qlcnic_83xx_dump_rom},
{QLCNIC_DUMP_READ_OCM, qlcnic_dump_ocm},
{QLCNIC_DUMP_PEG_REG, qlcnic_dump_ctrl},
{QLCNIC_DUMP_L1_DTAG, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L1_ITAG, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L1_DATA, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L1_INST, qlcnic_dump_l1_cache},
{QLCNIC_DUMP_L2_DTAG, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_L2_ITAG, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_L2_DATA, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_L2_INST, qlcnic_dump_l2_cache},
{QLCNIC_DUMP_POLL_RD, qlcnic_read_pollrd},
{QLCNIC_READ_MUX2, qlcnic_read_mux2},
{QLCNIC_READ_POLLRDMWR, qlcnic_read_pollrdmwr},
{QLCNIC_DUMP_READ_ROM, qlcnic_83xx_dump_rom},
{QLCNIC_DUMP_READ_MEM, qlcnic_read_memory},
{QLCNIC_DUMP_READ_CTRL, qlcnic_dump_ctrl},
{QLCNIC_DUMP_TLHDR, qlcnic_dump_nop},
{QLCNIC_DUMP_RDEND, qlcnic_dump_nop},
};
static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u32 temp_size)
{
uint64_t sum = 0;
int count = temp_size / sizeof(uint32_t);
while (count-- > 0)
sum += *temp_buffer++;
while (sum >> 32)
sum = (sum & 0xFFFFFFFF) + (sum >> 32);
return ~sum;
}
static int qlcnic_fw_flash_get_minidump_temp(struct qlcnic_adapter *adapter,
u8 *buffer, u32 size)
{
int ret = 0;
if (qlcnic_82xx_check(adapter))
return -EIO;
if (qlcnic_83xx_lock_flash(adapter))
return -EIO;
ret = qlcnic_83xx_lockless_flash_read32(adapter,
QLC_83XX_MINIDUMP_FLASH,
buffer, size / sizeof(u32));
qlcnic_83xx_unlock_flash(adapter);
return ret;
}
static int
qlcnic_fw_flash_get_minidump_temp_size(struct qlcnic_adapter *adapter,
struct qlcnic_cmd_args *cmd)
{
struct qlcnic_dump_template_hdr tmp_hdr;
u32 size = sizeof(struct qlcnic_dump_template_hdr) / sizeof(u32);
int ret = 0;
if (qlcnic_82xx_check(adapter))
return -EIO;
if (qlcnic_83xx_lock_flash(adapter))
return -EIO;
ret = qlcnic_83xx_lockless_flash_read32(adapter,
QLC_83XX_MINIDUMP_FLASH,
(u8 *)&tmp_hdr, size);
qlcnic_83xx_unlock_flash(adapter);
cmd->rsp.arg[2] = tmp_hdr.size;
cmd->rsp.arg[3] = tmp_hdr.version;
return ret;
}
static int qlcnic_fw_get_minidump_temp_size(struct qlcnic_adapter *adapter,
u32 *version, u32 *temp_size,
u8 *use_flash_temp)
{
int err = 0;
struct qlcnic_cmd_args cmd;
if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_TEMP_SIZE))
return -ENOMEM;
err = qlcnic_issue_cmd(adapter, &cmd);
if (err != QLCNIC_RCODE_SUCCESS) {
if (qlcnic_fw_flash_get_minidump_temp_size(adapter, &cmd)) {
qlcnic_free_mbx_args(&cmd);
return -EIO;
}
*use_flash_temp = 1;
}
*temp_size = cmd.rsp.arg[2];
*version = cmd.rsp.arg[3];
qlcnic_free_mbx_args(&cmd);
if (!(*temp_size))
return -EIO;
return 0;
}
static int __qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter,
u32 *buffer, u32 temp_size)
{
int err = 0, i;
void *tmp_addr;
__le32 *tmp_buf;
struct qlcnic_cmd_args cmd;
dma_addr_t tmp_addr_t = 0;
tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
&tmp_addr_t, GFP_KERNEL);
if (!tmp_addr) {
dev_err(&adapter->pdev->dev,
"Can't get memory for FW dump template\n");
return -ENOMEM;
}
if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_TEMP_HDR)) {
err = -ENOMEM;
goto free_mem;
}
cmd.req.arg[1] = LSD(tmp_addr_t);
cmd.req.arg[2] = MSD(tmp_addr_t);
cmd.req.arg[3] = temp_size;
err = qlcnic_issue_cmd(adapter, &cmd);
tmp_buf = tmp_addr;
if (err == QLCNIC_RCODE_SUCCESS) {
for (i = 0; i < temp_size / sizeof(u32); i++)
*buffer++ = __le32_to_cpu(*tmp_buf++);
}
qlcnic_free_mbx_args(&cmd);
free_mem:
dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
return err;
}
int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
{
int err;
u32 temp_size = 0;
u32 version, csum, *tmp_buf;
struct qlcnic_hardware_context *ahw;
struct qlcnic_dump_template_hdr *tmpl_hdr;
u8 use_flash_temp = 0;
ahw = adapter->ahw;
err = qlcnic_fw_get_minidump_temp_size(adapter, &version, &temp_size,
&use_flash_temp);
if (err) {
dev_err(&adapter->pdev->dev,
"Can't get template size %d\n", err);
return -EIO;
}
ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
if (!ahw->fw_dump.tmpl_hdr)
return -ENOMEM;
tmp_buf = (u32 *)ahw->fw_dump.tmpl_hdr;
if (use_flash_temp)
goto flash_temp;
err = __qlcnic_fw_cmd_get_minidump_temp(adapter, tmp_buf, temp_size);
if (err) {
flash_temp:
err = qlcnic_fw_flash_get_minidump_temp(adapter, (u8 *)tmp_buf,
temp_size);
if (err) {
dev_err(&adapter->pdev->dev,
"Failed to get minidump template header %d\n",
err);
vfree(ahw->fw_dump.tmpl_hdr);
ahw->fw_dump.tmpl_hdr = NULL;
return -EIO;
}
}
csum = qlcnic_temp_checksum((uint32_t *)tmp_buf, temp_size);
if (csum) {
dev_err(&adapter->pdev->dev,
"Template header checksum validation failed\n");
vfree(ahw->fw_dump.tmpl_hdr);
ahw->fw_dump.tmpl_hdr = NULL;
return -EIO;
}
tmpl_hdr = ahw->fw_dump.tmpl_hdr;
tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
ahw->fw_dump.enable = 1;
return 0;
}
int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
{
__le32 *buffer;
u32 ocm_window;
char mesg[64];
char *msg[] = {mesg, NULL};
int i, k, ops_cnt, ops_index, dump_size = 0;
@ -550,12 +906,23 @@ int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
struct qlcnic_dump_entry *entry;
struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
struct qlcnic_dump_template_hdr *tmpl_hdr = fw_dump->tmpl_hdr;
static const struct qlcnic_dump_operations *fw_dump_ops;
struct qlcnic_hardware_context *ahw;
ahw = adapter->ahw;
if (!fw_dump->enable) {
dev_info(&adapter->pdev->dev, "Dump not enabled\n");
return -EIO;
}
if (fw_dump->clr) {
dev_info(&adapter->pdev->dev,
"Previous dump not cleared, not capturing dump\n");
return -EIO;
}
netif_info(adapter->ahw, drv, adapter->netdev, "Take FW dump\n");
/* Calculate the size for dump data area only */
for (i = 2, k = 1; (i & QLCNIC_DUMP_MASK_MAX); i <<= 1, k++)
if (i & tmpl_hdr->drv_cap_mask)
@ -573,11 +940,21 @@ int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
buffer = fw_dump->data;
fw_dump->size = dump_size;
no_entries = tmpl_hdr->num_entries;
ops_cnt = ARRAY_SIZE(fw_dump_ops);
entry_offset = tmpl_hdr->offset;
tmpl_hdr->sys_info[0] = QLCNIC_DRIVER_VERSION;
tmpl_hdr->sys_info[1] = adapter->fw_version;
if (qlcnic_82xx_check(adapter)) {
ops_cnt = ARRAY_SIZE(qlcnic_fw_dump_ops);
fw_dump_ops = qlcnic_fw_dump_ops;
} else {
ops_cnt = ARRAY_SIZE(qlcnic_83xx_fw_dump_ops);
fw_dump_ops = qlcnic_83xx_fw_dump_ops;
ocm_window = tmpl_hdr->ocm_wnd_reg[adapter->ahw->pci_func];
tmpl_hdr->saved_state[QLC_83XX_OCM_INDEX] = ocm_window;
tmpl_hdr->saved_state[QLC_83XX_PCI_INDEX] = ahw->pci_func;
}
for (i = 0; i < no_entries; i++) {
entry = (void *)tmpl_hdr + entry_offset;
if (!(entry->hdr.mask & tmpl_hdr->drv_cap_mask)) {
@ -585,6 +962,7 @@ int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
entry_offset += entry->hdr.offset;
continue;
}
/* Find the handler for this entry */
ops_index = 0;
while (ops_index < ops_cnt) {
@ -592,16 +970,17 @@ int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
break;
ops_index++;
}
if (ops_index == ops_cnt) {
dev_info(&adapter->pdev->dev,
"Invalid entry type %d, exiting dump\n",
entry->hdr.type);
goto error;
}
/* Collect dump for this entry */
dump = fw_dump_ops[ops_index].handler(adapter, entry, buffer);
if (dump && !qlcnic_valid_dump_entry(&adapter->pdev->dev, entry,
dump))
if (!qlcnic_valid_dump_entry(&adapter->pdev->dev, entry, dump))
entry->hdr.flags |= QLCNIC_DUMP_SKIP;
buf_offset += entry->hdr.cap_size;
entry_offset += entry->hdr.offset;
@ -616,8 +995,8 @@ int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
fw_dump->clr = 1;
snprintf(mesg, sizeof(mesg), "FW_DUMP=%s",
adapter->netdev->name);
dev_info(&adapter->pdev->dev, "Dump data, %d bytes captured\n",
fw_dump->size);
dev_info(&adapter->pdev->dev, "%s: Dump data, %d bytes captured\n",
adapter->netdev->name, fw_dump->size);
/* Send a udev event to notify availability of FW dump */
kobject_uevent_env(&adapter->pdev->dev.kobj, KOBJ_CHANGE, msg);
return 0;
@ -626,3 +1005,21 @@ int qlcnic_dump_fw(struct qlcnic_adapter *adapter)
vfree(fw_dump->data);
return -EINVAL;
}
void qlcnic_83xx_get_minidump_template(struct qlcnic_adapter *adapter)
{
u32 prev_version, current_version;
struct qlcnic_hardware_context *ahw = adapter->ahw;
struct qlcnic_fw_dump *fw_dump = &ahw->fw_dump;
struct pci_dev *pdev = adapter->pdev;
prev_version = adapter->fw_version;
current_version = qlcnic_83xx_get_fw_version(adapter);
if (fw_dump->tmpl_hdr == NULL || current_version > prev_version) {
if (fw_dump->tmpl_hdr)
vfree(fw_dump->tmpl_hdr);
if (!qlcnic_fw_cmd_get_minidump_temp(adapter))
dev_info(&pdev->dev, "Supports FW dump capability\n");
}
}