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https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
Merge branch 'thunderx-cleanups'
Sunil Goutham says: ==================== net: thunderx: Miscellaneous cleanups This patch series contains contains couple of cleanup patches. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
4c9668dfe1
2 changed files with 63 additions and 160 deletions
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@ -18,14 +18,6 @@
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#include "q_struct.h"
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#include "q_struct.h"
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#include "nicvf_queues.h"
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#include "nicvf_queues.h"
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struct rbuf_info {
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struct page *page;
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void *data;
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u64 offset;
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};
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#define GET_RBUF_INFO(x) ((struct rbuf_info *)(x - NICVF_RCV_BUF_ALIGN_BYTES))
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/* Poll a register for a specific value */
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/* Poll a register for a specific value */
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static int nicvf_poll_reg(struct nicvf *nic, int qidx,
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static int nicvf_poll_reg(struct nicvf *nic, int qidx,
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u64 reg, int bit_pos, int bits, int val)
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u64 reg, int bit_pos, int bits, int val)
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@ -86,8 +78,6 @@ static void nicvf_free_q_desc_mem(struct nicvf *nic, struct q_desc_mem *dmem)
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static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp,
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static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp,
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u32 buf_len, u64 **rbuf)
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u32 buf_len, u64 **rbuf)
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{
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{
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u64 data;
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struct rbuf_info *rinfo;
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int order = get_order(buf_len);
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int order = get_order(buf_len);
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/* Check if request can be accomodated in previous allocated page */
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/* Check if request can be accomodated in previous allocated page */
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@ -113,46 +103,28 @@ static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp,
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nic->rb_page_offset = 0;
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nic->rb_page_offset = 0;
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}
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}
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data = (u64)page_address(nic->rb_page) + nic->rb_page_offset;
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*rbuf = (u64 *)((u64)page_address(nic->rb_page) + nic->rb_page_offset);
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/* Align buffer addr to cache line i.e 128 bytes */
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rinfo = (struct rbuf_info *)(data + NICVF_RCV_BUF_ALIGN_LEN(data));
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/* Save page address for reference updation */
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rinfo->page = nic->rb_page;
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/* Store start address for later retrieval */
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rinfo->data = (void *)data;
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/* Store alignment offset */
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rinfo->offset = NICVF_RCV_BUF_ALIGN_LEN(data);
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data += rinfo->offset;
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/* Give next aligned address to hw for DMA */
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*rbuf = (u64 *)(data + NICVF_RCV_BUF_ALIGN_BYTES);
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return 0;
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return 0;
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}
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}
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/* Retrieve actual buffer start address and build skb for received packet */
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/* Build skb around receive buffer */
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static struct sk_buff *nicvf_rb_ptr_to_skb(struct nicvf *nic,
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static struct sk_buff *nicvf_rb_ptr_to_skb(struct nicvf *nic,
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u64 rb_ptr, int len)
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u64 rb_ptr, int len)
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{
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{
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void *data;
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struct sk_buff *skb;
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struct sk_buff *skb;
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struct rbuf_info *rinfo;
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rb_ptr = (u64)phys_to_virt(rb_ptr);
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data = phys_to_virt(rb_ptr);
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/* Get buffer start address and alignment offset */
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rinfo = GET_RBUF_INFO(rb_ptr);
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/* Now build an skb to give to stack */
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/* Now build an skb to give to stack */
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skb = build_skb(rinfo->data, RCV_FRAG_LEN);
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skb = build_skb(data, RCV_FRAG_LEN);
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if (!skb) {
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if (!skb) {
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put_page(rinfo->page);
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put_page(virt_to_page(data));
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return NULL;
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return NULL;
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}
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}
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/* Set correct skb->data */
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prefetch(skb->data);
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skb_reserve(skb, rinfo->offset + NICVF_RCV_BUF_ALIGN_BYTES);
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prefetch((void *)rb_ptr);
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return skb;
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return skb;
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}
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}
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@ -196,7 +168,6 @@ static void nicvf_free_rbdr(struct nicvf *nic, struct rbdr *rbdr)
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int head, tail;
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int head, tail;
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u64 buf_addr;
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u64 buf_addr;
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struct rbdr_entry_t *desc;
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struct rbdr_entry_t *desc;
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struct rbuf_info *rinfo;
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if (!rbdr)
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if (!rbdr)
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return;
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return;
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@ -212,16 +183,14 @@ static void nicvf_free_rbdr(struct nicvf *nic, struct rbdr *rbdr)
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while (head != tail) {
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while (head != tail) {
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desc = GET_RBDR_DESC(rbdr, head);
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desc = GET_RBDR_DESC(rbdr, head);
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buf_addr = desc->buf_addr << NICVF_RCV_BUF_ALIGN;
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buf_addr = desc->buf_addr << NICVF_RCV_BUF_ALIGN;
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rinfo = GET_RBUF_INFO((u64)phys_to_virt(buf_addr));
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put_page(virt_to_page(phys_to_virt(buf_addr)));
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put_page(rinfo->page);
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head++;
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head++;
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head &= (rbdr->dmem.q_len - 1);
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head &= (rbdr->dmem.q_len - 1);
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}
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}
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/* Free SKB of tail desc */
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/* Free SKB of tail desc */
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desc = GET_RBDR_DESC(rbdr, tail);
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desc = GET_RBDR_DESC(rbdr, tail);
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buf_addr = desc->buf_addr << NICVF_RCV_BUF_ALIGN;
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buf_addr = desc->buf_addr << NICVF_RCV_BUF_ALIGN;
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rinfo = GET_RBUF_INFO((u64)phys_to_virt(buf_addr));
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put_page(virt_to_page(phys_to_virt(buf_addr)));
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put_page(rinfo->page);
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/* Free RBDR ring */
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/* Free RBDR ring */
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nicvf_free_q_desc_mem(nic, &rbdr->dmem);
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nicvf_free_q_desc_mem(nic, &rbdr->dmem);
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@ -1234,85 +1203,10 @@ struct sk_buff *nicvf_get_rcv_skb(struct nicvf *nic, struct cqe_rx_t *cqe_rx)
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return skb;
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return skb;
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}
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}
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/* Enable interrupt */
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static u64 nicvf_int_type_to_mask(int int_type, int q_idx)
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void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx)
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{
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{
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u64 reg_val;
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u64 reg_val;
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reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);
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switch (int_type) {
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case NICVF_INTR_CQ:
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reg_val |= ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
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break;
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case NICVF_INTR_SQ:
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reg_val |= ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
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break;
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case NICVF_INTR_RBDR:
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reg_val |= ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
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break;
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case NICVF_INTR_PKT_DROP:
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reg_val |= (1ULL << NICVF_INTR_PKT_DROP_SHIFT);
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break;
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case NICVF_INTR_TCP_TIMER:
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reg_val |= (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);
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break;
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case NICVF_INTR_MBOX:
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reg_val |= (1ULL << NICVF_INTR_MBOX_SHIFT);
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break;
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case NICVF_INTR_QS_ERR:
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reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);
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break;
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default:
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netdev_err(nic->netdev,
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"Failed to enable interrupt: unknown type\n");
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break;
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}
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nicvf_reg_write(nic, NIC_VF_ENA_W1S, reg_val);
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}
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/* Disable interrupt */
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void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx)
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{
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u64 reg_val = 0;
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switch (int_type) {
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case NICVF_INTR_CQ:
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reg_val |= ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
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break;
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case NICVF_INTR_SQ:
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reg_val |= ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
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break;
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case NICVF_INTR_RBDR:
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reg_val |= ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
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break;
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case NICVF_INTR_PKT_DROP:
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reg_val |= (1ULL << NICVF_INTR_PKT_DROP_SHIFT);
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break;
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case NICVF_INTR_TCP_TIMER:
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reg_val |= (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);
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break;
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case NICVF_INTR_MBOX:
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reg_val |= (1ULL << NICVF_INTR_MBOX_SHIFT);
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break;
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case NICVF_INTR_QS_ERR:
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reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);
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break;
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default:
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netdev_err(nic->netdev,
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"Failed to disable interrupt: unknown type\n");
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break;
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}
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nicvf_reg_write(nic, NIC_VF_ENA_W1C, reg_val);
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}
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/* Clear interrupt */
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void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx)
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{
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u64 reg_val = 0;
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switch (int_type) {
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switch (int_type) {
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case NICVF_INTR_CQ:
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case NICVF_INTR_CQ:
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reg_val = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
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reg_val = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
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@ -1333,54 +1227,69 @@ void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx)
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reg_val = (1ULL << NICVF_INTR_MBOX_SHIFT);
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reg_val = (1ULL << NICVF_INTR_MBOX_SHIFT);
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break;
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break;
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case NICVF_INTR_QS_ERR:
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case NICVF_INTR_QS_ERR:
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reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);
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reg_val = (1ULL << NICVF_INTR_QS_ERR_SHIFT);
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break;
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break;
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default:
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default:
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netdev_err(nic->netdev,
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reg_val = 0;
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"Failed to clear interrupt: unknown type\n");
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break;
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}
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}
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nicvf_reg_write(nic, NIC_VF_INT, reg_val);
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return reg_val;
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}
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/* Enable interrupt */
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void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx)
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{
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u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
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if (!mask) {
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netdev_dbg(nic->netdev,
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"Failed to enable interrupt: unknown type\n");
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return;
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}
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nicvf_reg_write(nic, NIC_VF_ENA_W1S,
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nicvf_reg_read(nic, NIC_VF_ENA_W1S) | mask);
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}
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/* Disable interrupt */
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void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx)
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{
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u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
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if (!mask) {
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netdev_dbg(nic->netdev,
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"Failed to disable interrupt: unknown type\n");
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return;
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}
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nicvf_reg_write(nic, NIC_VF_ENA_W1C, mask);
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}
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/* Clear interrupt */
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void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx)
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{
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u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
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if (!mask) {
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netdev_dbg(nic->netdev,
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"Failed to clear interrupt: unknown type\n");
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return;
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}
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nicvf_reg_write(nic, NIC_VF_INT, mask);
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}
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}
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/* Check if interrupt is enabled */
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/* Check if interrupt is enabled */
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int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx)
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int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx)
|
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{
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{
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u64 reg_val;
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u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
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u64 mask = 0xff;
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/* If interrupt type is unknown, we treat it disabled. */
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if (!mask) {
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reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);
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netdev_dbg(nic->netdev,
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|
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switch (int_type) {
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case NICVF_INTR_CQ:
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mask = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
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break;
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case NICVF_INTR_SQ:
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mask = ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
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break;
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case NICVF_INTR_RBDR:
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mask = ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
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break;
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case NICVF_INTR_PKT_DROP:
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mask = NICVF_INTR_PKT_DROP_MASK;
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|
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break;
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case NICVF_INTR_TCP_TIMER:
|
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mask = NICVF_INTR_TCP_TIMER_MASK;
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|
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break;
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case NICVF_INTR_MBOX:
|
|
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mask = NICVF_INTR_MBOX_MASK;
|
|
||||||
break;
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|
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case NICVF_INTR_QS_ERR:
|
|
||||||
mask = NICVF_INTR_QS_ERR_MASK;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
netdev_err(nic->netdev,
|
|
||||||
"Failed to check interrupt enable: unknown type\n");
|
"Failed to check interrupt enable: unknown type\n");
|
||||||
break;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return (reg_val & mask);
|
return mask & nicvf_reg_read(nic, NIC_VF_ENA_W1S);
|
||||||
}
|
}
|
||||||
|
|
||||||
void nicvf_update_rq_stats(struct nicvf *nic, int rq_idx)
|
void nicvf_update_rq_stats(struct nicvf *nic, int rq_idx)
|
||||||
|
|
|
@ -83,10 +83,8 @@
|
||||||
#define MAX_RCV_BUF_COUNT (1ULL << (RBDR_SIZE6 + 13))
|
#define MAX_RCV_BUF_COUNT (1ULL << (RBDR_SIZE6 + 13))
|
||||||
#define RBDR_THRESH (RCV_BUF_COUNT / 2)
|
#define RBDR_THRESH (RCV_BUF_COUNT / 2)
|
||||||
#define DMA_BUFFER_LEN 2048 /* In multiples of 128bytes */
|
#define DMA_BUFFER_LEN 2048 /* In multiples of 128bytes */
|
||||||
#define RCV_FRAG_LEN (SKB_DATA_ALIGN(DMA_BUFFER_LEN + NET_SKB_PAD) + \
|
#define RCV_FRAG_LEN (SKB_DATA_ALIGN(DMA_BUFFER_LEN + NET_SKB_PAD) + \
|
||||||
SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + \
|
SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
|
||||||
(NICVF_RCV_BUF_ALIGN_BYTES * 2))
|
|
||||||
#define RCV_DATA_OFFSET NICVF_RCV_BUF_ALIGN_BYTES
|
|
||||||
|
|
||||||
#define MAX_CQES_FOR_TX ((SND_QUEUE_LEN / MIN_SQ_DESC_PER_PKT_XMIT) * \
|
#define MAX_CQES_FOR_TX ((SND_QUEUE_LEN / MIN_SQ_DESC_PER_PKT_XMIT) * \
|
||||||
MAX_CQE_PER_PKT_XMIT)
|
MAX_CQE_PER_PKT_XMIT)
|
||||||
|
@ -108,10 +106,6 @@
|
||||||
#define NICVF_SQ_BASE_ALIGN_BYTES 128 /* 7 bits */
|
#define NICVF_SQ_BASE_ALIGN_BYTES 128 /* 7 bits */
|
||||||
|
|
||||||
#define NICVF_ALIGNED_ADDR(ADDR, ALIGN_BYTES) ALIGN(ADDR, ALIGN_BYTES)
|
#define NICVF_ALIGNED_ADDR(ADDR, ALIGN_BYTES) ALIGN(ADDR, ALIGN_BYTES)
|
||||||
#define NICVF_ADDR_ALIGN_LEN(ADDR, BYTES)\
|
|
||||||
(NICVF_ALIGNED_ADDR(ADDR, BYTES) - BYTES)
|
|
||||||
#define NICVF_RCV_BUF_ALIGN_LEN(X)\
|
|
||||||
(NICVF_ALIGNED_ADDR(X, NICVF_RCV_BUF_ALIGN_BYTES) - X)
|
|
||||||
|
|
||||||
/* Queue enable/disable */
|
/* Queue enable/disable */
|
||||||
#define NICVF_SQ_EN BIT_ULL(19)
|
#define NICVF_SQ_EN BIT_ULL(19)
|
||||||
|
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