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net/mlx5: DR, Add infrastructure for supporting several steering formats

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Add a struct of device specific callbacks for STE layer below dr_ste.
Each device will implement its HW-specific function, and a comon logic
from the DR code will access these functions through the new ste_ctx API.

More callbacks will follow in the subsequent patches.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Yevgeny Kliteynik 2020-11-19 04:53:53 +02:00 committed by Saeed Mahameed
parent f6e7a024bf
commit 4bdba39b70
2 changed files with 37 additions and 1 deletions
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2
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
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@ -3,7 +3,7 @@
#include <linux/types.h>
#include <linux/crc32.h>
#include "dr_types.h"
#include "dr_ste.h"
#define DR_STE_CRC_POLY 0xEDB88320L
#define STE_IPV4 0x1

36
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h Normal file
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@ -0,0 +1,36 @@
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/* Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved. */
#ifndef _DR_STE_
#define _DR_STE_
#include "dr_types.h"
#define DR_STE_CTX_BUILDER(fname) \
((*build_##fname##_init)(struct mlx5dr_ste_build *sb, \
struct mlx5dr_match_param *mask))
struct mlx5dr_ste_ctx {
void DR_STE_CTX_BUILDER(eth_l2_src_dst);
void DR_STE_CTX_BUILDER(eth_l3_ipv6_src);
void DR_STE_CTX_BUILDER(eth_l3_ipv6_dst);
void DR_STE_CTX_BUILDER(eth_l3_ipv4_5_tuple);
void DR_STE_CTX_BUILDER(eth_l2_src);
void DR_STE_CTX_BUILDER(eth_l2_dst);
void DR_STE_CTX_BUILDER(eth_l2_tnl);
void DR_STE_CTX_BUILDER(eth_l3_ipv4_misc);
void DR_STE_CTX_BUILDER(eth_ipv6_l3_l4);
void DR_STE_CTX_BUILDER(mpls);
void DR_STE_CTX_BUILDER(tnl_gre);
void DR_STE_CTX_BUILDER(tnl_mpls);
int DR_STE_CTX_BUILDER(icmp);
void DR_STE_CTX_BUILDER(general_purpose);
void DR_STE_CTX_BUILDER(eth_l4_misc);
void DR_STE_CTX_BUILDER(tnl_vxlan_gpe);
void DR_STE_CTX_BUILDER(tnl_geneve);
void DR_STE_CTX_BUILDER(register_0);
void DR_STE_CTX_BUILDER(register_1);
void DR_STE_CTX_BUILDER(src_gvmi_qpn);
};
#endif /* _DR_STE_ */