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imxmmc: Checkpatch cleanup

Browse source 
This cleans up the warnings issued by the checkpatch script
and remove the file history from the header

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Marc Kleine-Budde 2008-10-10 12:05:03 +02:00 committed by Sascha Hauer
parent 3287abbd71
commit 4b7c0e4cae
1 changed files with 141 additions and 160 deletions
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301
drivers/mmc/host/imxmmc.c
View file

@ -10,20 +10,6 @@
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
* 2005-04-17 Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Changed to conform redesigned i.MX scatter gather DMA interface
*
* 2005-11-04 Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Updated for 2.6.14 kernel
*
* 2005-12-13 Jay Monkman <jtm@smoothsmoothie.com>
* Found and corrected problems in the write path
*
* 2005-12-30 Pavel Pisa <pisa@cmp.felk.cvut.cz>
* The event handling rewritten right way in softirq.
* Added many ugly hacks and delays to overcome SDHC
* deficiencies
*
*/ */
#include <linux/module.h> #include <linux/module.h>
@ -37,9 +23,9 @@
#include <linux/mmc/card.h> #include <linux/mmc/card.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/io.h>
#include <asm/dma.h> #include <asm/dma.h>
#include <asm/io.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/sizes.h> #include <asm/sizes.h>
#include <mach/mmc.h> #include <mach/mmc.h>
@ -50,8 +36,8 @@
#define DRIVER_NAME "imx-mmc" #define DRIVER_NAME "imx-mmc"
#define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \ #define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \
INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \ INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \
INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO) INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO)
struct imxmci_host { struct imxmci_host {
struct mmc_host *mmc; struct mmc_host *mmc;
@ -74,7 +60,7 @@ struct imxmci_host {
struct tasklet_struct tasklet; struct tasklet_struct tasklet;
unsigned int status_reg; unsigned int status_reg;
unsigned long pending_events; unsigned long pending_events;
/* Next to fields are there for CPU driven transfers to overcome SDHC deficiencies */ /* Next two fields are there for CPU driven transfers to overcome SDHC deficiencies */
u16 *data_ptr; u16 *data_ptr;
unsigned int data_cnt; unsigned int data_cnt;
atomic_t stuck_timeout; atomic_t stuck_timeout;
@ -115,13 +101,13 @@ static void imxmci_stop_clock(struct imxmci_host *host)
{ {
int i = 0; int i = 0;
MMC_STR_STP_CLK &= ~STR_STP_CLK_START_CLK; MMC_STR_STP_CLK &= ~STR_STP_CLK_START_CLK;
while(i < 0x1000) { while (i < 0x1000) {
if(!(i & 0x7f)) if (!(i & 0x7f))
MMC_STR_STP_CLK |= STR_STP_CLK_STOP_CLK; MMC_STR_STP_CLK |= STR_STP_CLK_STOP_CLK;
if(!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) { if (!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) {
/* Check twice before cut */ /* Check twice before cut */
if(!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) if (!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN))
return; return;
} }
@ -150,13 +136,13 @@ static int imxmci_start_clock(struct imxmci_host *host)
do { do {
unsigned int delay = delay_limit; unsigned int delay = delay_limit;
while(delay--){ while (delay--) {
if(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN) if (MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)
/* Check twice before cut */ /* Check twice before cut */
if(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN) if (MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)
return 0; return 0;
if(test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) if (test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
return 0; return 0;
} }
@ -167,11 +153,11 @@ static int imxmci_start_clock(struct imxmci_host *host)
* IRQ or schedule delays this function execution and the clocks has * IRQ or schedule delays this function execution and the clocks has
* been already stopped by other means (response processing, SDHC HW) * been already stopped by other means (response processing, SDHC HW)
*/ */
if(!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) if (!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK; MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK;
local_irq_restore(flags); local_irq_restore(flags);
} while(++trials<256); } while (++trials < 256);
dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n"); dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n");
@ -198,13 +184,14 @@ static void imxmci_softreset(void)
} }
static int imxmci_busy_wait_for_status(struct imxmci_host *host, static int imxmci_busy_wait_for_status(struct imxmci_host *host,
unsigned int *pstat, unsigned int stat_mask, unsigned int *pstat, unsigned int stat_mask,
int timeout, const char *where) int timeout, const char *where)
{ {
int loops=0; int loops = 0;
while(!(*pstat & stat_mask)) {
loops+=2; while (!(*pstat & stat_mask)) {
if(loops >= timeout) { loops += 2;
if (loops >= timeout) {
dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n", dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n",
where, *pstat, stat_mask); where, *pstat, stat_mask);
return -1; return -1;
@ -212,13 +199,13 @@ static int imxmci_busy_wait_for_status(struct imxmci_host *host,
udelay(2); udelay(2);
*pstat |= MMC_STATUS; *pstat |= MMC_STATUS;
} }
if(!loops) if (!loops)
return 0; return 0;
/* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */ /* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */
if(!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock>=8000000)) if (!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock >= 8000000))
dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n", dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n",
loops, where, *pstat, stat_mask); loops, where, *pstat, stat_mask);
return loops; return loops;
} }
@ -259,7 +246,7 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
} }
/* Convert back to virtual address */ /* Convert back to virtual address */
host->data_ptr = (u16*)sg_virt(data->sg); host->data_ptr = (u16 *)sg_virt(data->sg);
host->data_cnt = 0; host->data_cnt = 0;
clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events); clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events);
@ -271,10 +258,10 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
if (data->flags & MMC_DATA_READ) { if (data->flags & MMC_DATA_READ) {
host->dma_dir = DMA_FROM_DEVICE; host->dma_dir = DMA_FROM_DEVICE;
host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
data->sg_len, host->dma_dir); data->sg_len, host->dma_dir);
imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz,
host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_READ); host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_READ);
/*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/ /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/
CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN; CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN;
@ -282,10 +269,10 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
host->dma_dir = DMA_TO_DEVICE; host->dma_dir = DMA_TO_DEVICE;
host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
data->sg_len, host->dma_dir); data->sg_len, host->dma_dir);
imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz,
host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_WRITE); host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_WRITE);
/*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/ /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/
CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN; CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN;
@ -293,12 +280,12 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
#if 1 /* This code is there only for consistency checking and can be disabled in future */ #if 1 /* This code is there only for consistency checking and can be disabled in future */
host->dma_size = 0; host->dma_size = 0;
for(i=0; i<host->dma_nents; i++) for (i = 0; i < host->dma_nents; i++)
host->dma_size+=data->sg[i].length; host->dma_size += data->sg[i].length;
if (datasz > host->dma_size) { if (datasz > host->dma_size) {
dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n", dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n",
datasz, host->dma_size); datasz, host->dma_size);
} }
#endif #endif
@ -306,7 +293,7 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
wmb(); wmb();
if(host->actual_bus_width == MMC_BUS_WIDTH_4) if (host->actual_bus_width == MMC_BUS_WIDTH_4)
BLR(host->dma) = 0; /* burst 64 byte read / 64 bytes write */ BLR(host->dma) = 0; /* burst 64 byte read / 64 bytes write */
else else
BLR(host->dma) = 16; /* burst 16 byte read / 16 bytes write */ BLR(host->dma) = 16; /* burst 16 byte read / 16 bytes write */
@ -317,9 +304,8 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events); clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events);
/* start DMA engine for read, write is delayed after initial response */ /* start DMA engine for read, write is delayed after initial response */
if (host->dma_dir == DMA_FROM_DEVICE) { if (host->dma_dir == DMA_FROM_DEVICE)
imx_dma_enable(host->dma); imx_dma_enable(host->dma);
}
} }
static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat) static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat)
@ -351,10 +337,10 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd,
break; break;
} }
if ( test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events) ) if (test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events))
cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */ cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */
if ( host->actual_bus_width == MMC_BUS_WIDTH_4 ) if (host->actual_bus_width == MMC_BUS_WIDTH_4)
cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; cmdat |= CMD_DAT_CONT_BUS_WIDTH_4;
MMC_CMD = cmd->opcode; MMC_CMD = cmd->opcode;
@ -368,12 +354,12 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd,
imask = IMXMCI_INT_MASK_DEFAULT; imask = IMXMCI_INT_MASK_DEFAULT;
imask &= ~INT_MASK_END_CMD_RES; imask &= ~INT_MASK_END_CMD_RES;
if ( cmdat & CMD_DAT_CONT_DATA_ENABLE ) { if (cmdat & CMD_DAT_CONT_DATA_ENABLE) {
/*imask &= ~INT_MASK_BUF_READY;*/ /* imask &= ~INT_MASK_BUF_READY; */
imask &= ~INT_MASK_DATA_TRAN; imask &= ~INT_MASK_DATA_TRAN;
if ( cmdat & CMD_DAT_CONT_WRITE ) if (cmdat & CMD_DAT_CONT_WRITE)
imask &= ~INT_MASK_WRITE_OP_DONE; imask &= ~INT_MASK_WRITE_OP_DONE;
if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
imask &= ~INT_MASK_BUF_READY; imask &= ~INT_MASK_BUF_READY;
} }
@ -395,14 +381,14 @@ static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *
spin_lock_irqsave(&host->lock, flags); spin_lock_irqsave(&host->lock, flags);
host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m | host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m |
IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m); IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m);
host->imask = IMXMCI_INT_MASK_DEFAULT; host->imask = IMXMCI_INT_MASK_DEFAULT;
MMC_INT_MASK = host->imask; MMC_INT_MASK = host->imask;
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
if(req && req->cmd) if (req && req->cmd)
host->prev_cmd_code = req->cmd->opcode; host->prev_cmd_code = req->cmd->opcode;
host->req = NULL; host->req = NULL;
@ -416,17 +402,17 @@ static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat)
struct mmc_data *data = host->data; struct mmc_data *data = host->data;
int data_error; int data_error;
if(test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)){ if (test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
imx_dma_disable(host->dma); imx_dma_disable(host->dma);
dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents, dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents,
host->dma_dir); host->dma_dir);
} }
if ( stat & STATUS_ERR_MASK ) { if (stat & STATUS_ERR_MASK) {
dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",stat); dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", stat);
if(stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR)) if (stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR))
data->error = -EILSEQ; data->error = -EILSEQ;
else if(stat & STATUS_TIME_OUT_READ) else if (stat & STATUS_TIME_OUT_READ)
data->error = -ETIMEDOUT; data->error = -ETIMEDOUT;
else else
data->error = -EIO; data->error = -EIO;
@ -445,7 +431,7 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
{ {
struct mmc_command *cmd = host->cmd; struct mmc_command *cmd = host->cmd;
int i; int i;
u32 a,b,c; u32 a, b, c;
struct mmc_data *data = host->data; struct mmc_data *data = host->data;
if (!cmd) if (!cmd)
@ -461,18 +447,18 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
cmd->error = -EILSEQ; cmd->error = -EILSEQ;
} }
if(cmd->flags & MMC_RSP_PRESENT) { if (cmd->flags & MMC_RSP_PRESENT) {
if(cmd->flags & MMC_RSP_136) { if (cmd->flags & MMC_RSP_136) {
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
u32 a = MMC_RES_FIFO & 0xffff; u32 d = MMC_RES_FIFO & 0xffff;
u32 b = MMC_RES_FIFO & 0xffff; u32 e = MMC_RES_FIFO & 0xffff;
cmd->resp[i] = a<<16 | b; cmd->resp[i] = d << 16 | e;
} }
} else { } else {
a = MMC_RES_FIFO & 0xffff; a = MMC_RES_FIFO & 0xffff;
b = MMC_RES_FIFO & 0xffff; b = MMC_RES_FIFO & 0xffff;
c = MMC_RES_FIFO & 0xffff; c = MMC_RES_FIFO & 0xffff;
cmd->resp[0] = a<<24 | b<<8 | c>>8; cmd->resp[0] = a << 24 | b << 8 | c >> 8;
} }
} }
@ -485,35 +471,33 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
/* Wait for FIFO to be empty before starting DMA write */ /* Wait for FIFO to be empty before starting DMA write */
stat = MMC_STATUS; stat = MMC_STATUS;
if(imxmci_busy_wait_for_status(host, &stat, if (imxmci_busy_wait_for_status(host, &stat,
STATUS_APPL_BUFF_FE, STATUS_APPL_BUFF_FE,
40, "imxmci_cmd_done DMA WR") < 0) { 40, "imxmci_cmd_done DMA WR") < 0) {
cmd->error = -EIO; cmd->error = -EIO;
imxmci_finish_data(host, stat); imxmci_finish_data(host, stat);
if(host->req) if (host->req)
imxmci_finish_request(host, host->req); imxmci_finish_request(host, host->req);
dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n", dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n",
stat); stat);
return 0; return 0;
} }
if(test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
imx_dma_enable(host->dma); imx_dma_enable(host->dma);
}
} }
} else { } else {
struct mmc_request *req; struct mmc_request *req;
imxmci_stop_clock(host); imxmci_stop_clock(host);
req = host->req; req = host->req;
if(data) if (data)
imxmci_finish_data(host, stat); imxmci_finish_data(host, stat);
if( req ) { if (req)
imxmci_finish_request(host, req); imxmci_finish_request(host, req);
} else { else
dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n"); dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n");
}
} }
return 1; return 1;
@ -535,11 +519,10 @@ static int imxmci_data_done(struct imxmci_host *host, unsigned int stat)
} else { } else {
struct mmc_request *req; struct mmc_request *req;
req = host->req; req = host->req;
if( req ) { if (req)
imxmci_finish_request(host, req); imxmci_finish_request(host, req);
} else { else
dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n"); dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n");
}
} }
return 1; return 1;
@ -552,7 +535,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
int trans_done = 0; int trans_done = 0;
unsigned int stat = *pstat; unsigned int stat = *pstat;
if(host->actual_bus_width != MMC_BUS_WIDTH_4) if (host->actual_bus_width != MMC_BUS_WIDTH_4)
burst_len = 16; burst_len = 16;
else else
burst_len = 64; burst_len = 64;
@ -563,27 +546,27 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
udelay(20); /* required for clocks < 8MHz*/ udelay(20); /* required for clocks < 8MHz*/
if(host->dma_dir == DMA_FROM_DEVICE) { if (host->dma_dir == DMA_FROM_DEVICE) {
imxmci_busy_wait_for_status(host, &stat, imxmci_busy_wait_for_status(host, &stat,
STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE | STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE |
STATUS_TIME_OUT_READ, STATUS_TIME_OUT_READ,
50, "imxmci_cpu_driven_data read"); 50, "imxmci_cpu_driven_data read");
while((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) && while ((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) &&
!(stat & STATUS_TIME_OUT_READ) && !(stat & STATUS_TIME_OUT_READ) &&
(host->data_cnt < 512)) { (host->data_cnt < 512)) {
udelay(20); /* required for clocks < 8MHz*/ udelay(20); /* required for clocks < 8MHz*/
for(i = burst_len; i>=2 ; i-=2) { for (i = burst_len; i >= 2 ; i -= 2) {
u16 data; u16 data;
data = MMC_BUFFER_ACCESS; data = MMC_BUFFER_ACCESS;
udelay(10); /* required for clocks < 8MHz*/ udelay(10); /* required for clocks < 8MHz*/
if(host->data_cnt+2 <= host->dma_size) { if (host->data_cnt+2 <= host->dma_size) {
*(host->data_ptr++) = data; *(host->data_ptr++) = data;
} else { } else {
if(host->data_cnt < host->dma_size) if (host->data_cnt < host->dma_size)
*(u8*)(host->data_ptr) = data; *(u8 *)(host->data_ptr) = data;
} }
host->data_cnt += 2; host->data_cnt += 2;
} }
@ -594,13 +577,13 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
host->data_cnt, burst_len, stat); host->data_cnt, burst_len, stat);
} }
if((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512)) if ((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512))
trans_done = 1; trans_done = 1;
if(host->dma_size & 0x1ff) if (host->dma_size & 0x1ff)
stat &= ~STATUS_CRC_READ_ERR; stat &= ~STATUS_CRC_READ_ERR;
if(stat & STATUS_TIME_OUT_READ) { if (stat & STATUS_TIME_OUT_READ) {
dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n", dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n",
stat); stat);
trans_done = -1; trans_done = -1;
@ -608,12 +591,12 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
} else { } else {
imxmci_busy_wait_for_status(host, &stat, imxmci_busy_wait_for_status(host, &stat,
STATUS_APPL_BUFF_FE, STATUS_APPL_BUFF_FE,
20, "imxmci_cpu_driven_data write"); 20, "imxmci_cpu_driven_data write");
while((stat & STATUS_APPL_BUFF_FE) && while ((stat & STATUS_APPL_BUFF_FE) &&
(host->data_cnt < host->dma_size)) { (host->data_cnt < host->dma_size)) {
if(burst_len >= host->dma_size - host->data_cnt) { if (burst_len >= host->dma_size - host->data_cnt) {
burst_len = host->dma_size - host->data_cnt; burst_len = host->dma_size - host->data_cnt;
host->data_cnt = host->dma_size; host->data_cnt = host->dma_size;
trans_done = 1; trans_done = 1;
@ -621,7 +604,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
host->data_cnt += burst_len; host->data_cnt += burst_len;
} }
for(i = burst_len; i>0 ; i-=2) for (i = burst_len; i > 0 ; i -= 2)
MMC_BUFFER_ACCESS = *(host->data_ptr++); MMC_BUFFER_ACCESS = *(host->data_ptr++);
stat = MMC_STATUS; stat = MMC_STATUS;
@ -671,7 +654,7 @@ static void imxmci_tasklet_fnc(unsigned long data)
unsigned int data_dir_mask = 0; /* STATUS_WR_CRC_ERROR_CODE_MASK */ unsigned int data_dir_mask = 0; /* STATUS_WR_CRC_ERROR_CODE_MASK */
int timeout = 0; int timeout = 0;
if(atomic_read(&host->stuck_timeout) > 4) { if (atomic_read(&host->stuck_timeout) > 4) {
char *what; char *what;
timeout = 1; timeout = 1;
stat = MMC_STATUS; stat = MMC_STATUS;
@ -683,7 +666,7 @@ static void imxmci_tasklet_fnc(unsigned long data)
what = "RESP"; what = "RESP";
else else
if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events)) if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events))
what = "DATA"; what = "DATA";
else else
what = "DMA"; what = "DMA";
@ -691,18 +674,18 @@ static void imxmci_tasklet_fnc(unsigned long data)
what = "???"; what = "???";
dev_err(mmc_dev(host->mmc), "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n", dev_err(mmc_dev(host->mmc), "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n",
what, stat, MMC_INT_MASK); what, stat, MMC_INT_MASK);
dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n", dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",
MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma)); MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma));
dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n", dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n",
host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1<<host->actual_bus_width, host->dma_size); host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1 << host->actual_bus_width, host->dma_size);
} }
if(!host->present || timeout) if (!host->present || timeout)
host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ | host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ |
STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR; STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR;
if(test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) { if (test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) {
clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events); clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events);
stat = MMC_STATUS; stat = MMC_STATUS;
@ -713,63 +696,62 @@ static void imxmci_tasklet_fnc(unsigned long data)
*/ */
stat |= host->status_reg; stat |= host->status_reg;
if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
stat &= ~STATUS_CRC_READ_ERR; stat &= ~STATUS_CRC_READ_ERR;
if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
imxmci_busy_wait_for_status(host, &stat, imxmci_busy_wait_for_status(host, &stat,
STATUS_END_CMD_RESP | STATUS_ERR_MASK, STATUS_END_CMD_RESP | STATUS_ERR_MASK,
20, "imxmci_tasklet_fnc resp (ERRATUM #4)"); 20, "imxmci_tasklet_fnc resp (ERRATUM #4)");
} }
if(stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) { if (stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) {
if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
imxmci_cmd_done(host, stat); imxmci_cmd_done(host, stat);
if(host->data && (stat & STATUS_ERR_MASK)) if (host->data && (stat & STATUS_ERR_MASK))
imxmci_data_done(host, stat); imxmci_data_done(host, stat);
} }
if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) { if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) {
stat |= MMC_STATUS; stat |= MMC_STATUS;
if(imxmci_cpu_driven_data(host, &stat)){ if (imxmci_cpu_driven_data(host, &stat)) {
if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
imxmci_cmd_done(host, stat); imxmci_cmd_done(host, stat);
atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m, atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m,
&host->pending_events); &host->pending_events);
imxmci_data_done(host, stat); imxmci_data_done(host, stat);
} }
} }
} }
if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) && if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) &&
!test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
stat = MMC_STATUS; stat = MMC_STATUS;
/* Same as above */ /* Same as above */
stat |= host->status_reg; stat |= host->status_reg;
if(host->dma_dir == DMA_TO_DEVICE) { if (host->dma_dir == DMA_TO_DEVICE)
data_dir_mask = STATUS_WRITE_OP_DONE; data_dir_mask = STATUS_WRITE_OP_DONE;
} else { else
data_dir_mask = STATUS_DATA_TRANS_DONE; data_dir_mask = STATUS_DATA_TRANS_DONE;
}
if(stat & data_dir_mask) { if (stat & data_dir_mask) {
clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events);
imxmci_data_done(host, stat); imxmci_data_done(host, stat);
} }
} }
if(test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) { if (test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) {
if(host->cmd) if (host->cmd)
imxmci_cmd_done(host, STATUS_TIME_OUT_RESP); imxmci_cmd_done(host, STATUS_TIME_OUT_RESP);
if(host->data) if (host->data)
imxmci_data_done(host, STATUS_TIME_OUT_READ | imxmci_data_done(host, STATUS_TIME_OUT_READ |
STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR); STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR);
if(host->req) if (host->req)
imxmci_finish_request(host, host->req); imxmci_finish_request(host, host->req);
mmc_detect_change(host->mmc, msecs_to_jiffies(100)); mmc_detect_change(host->mmc, msecs_to_jiffies(100));
@ -796,9 +778,8 @@ static void imxmci_request(struct mmc_host *mmc, struct mmc_request *req)
if (req->data->flags & MMC_DATA_WRITE) if (req->data->flags & MMC_DATA_WRITE)
cmdat |= CMD_DAT_CONT_WRITE; cmdat |= CMD_DAT_CONT_WRITE;
if (req->data->flags & MMC_DATA_STREAM) { if (req->data->flags & MMC_DATA_STREAM)
cmdat |= CMD_DAT_CONT_STREAM_BLOCK; cmdat |= CMD_DAT_CONT_STREAM_BLOCK;
}
} }
imxmci_start_cmd(host, req->cmd, cmdat); imxmci_start_cmd(host, req->cmd, cmdat);
@ -811,36 +792,36 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
struct imxmci_host *host = mmc_priv(mmc); struct imxmci_host *host = mmc_priv(mmc);
int prescaler; int prescaler;
if( ios->bus_width==MMC_BUS_WIDTH_4 ) { if (ios->bus_width == MMC_BUS_WIDTH_4) {
host->actual_bus_width = MMC_BUS_WIDTH_4; host->actual_bus_width = MMC_BUS_WIDTH_4;
imx_gpio_mode(PB11_PF_SD_DAT3); imx_gpio_mode(PB11_PF_SD_DAT3);
}else{ } else {
host->actual_bus_width = MMC_BUS_WIDTH_1; host->actual_bus_width = MMC_BUS_WIDTH_1;
imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11); imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11);
} }
if ( host->power_mode != ios->power_mode ) { if (host->power_mode != ios->power_mode) {
switch (ios->power_mode) { switch (ios->power_mode) {
case MMC_POWER_OFF: case MMC_POWER_OFF:
break; break;
case MMC_POWER_UP: case MMC_POWER_UP:
set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events);
break; break;
case MMC_POWER_ON: case MMC_POWER_ON:
break; break;
} }
host->power_mode = ios->power_mode; host->power_mode = ios->power_mode;
} }
if ( ios->clock ) { if (ios->clock) {
unsigned int clk; unsigned int clk;
/* The prescaler is 5 for PERCLK2 equal to 96MHz /* The prescaler is 5 for PERCLK2 equal to 96MHz
* then 96MHz / 5 = 19.2 MHz * then 96MHz / 5 = 19.2 MHz
*/ */
clk = clk_get_rate(host->clk); clk = clk_get_rate(host->clk);
prescaler=(clk+(CLK_RATE*7)/8)/CLK_RATE; prescaler = (clk + (CLK_RATE * 7) / 8) / CLK_RATE;
switch(prescaler) { switch (prescaler) {
case 0: case 0:
case 1: prescaler = 0; case 1: prescaler = 0;
break; break;
@ -858,22 +839,22 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n", dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n",
clk, prescaler); clk, prescaler);
for(clk=0; clk<8; clk++) { for (clk = 0; clk < 8; clk++) {
int x; int x;
x = CLK_RATE / (1<<clk); x = CLK_RATE / (1 << clk);
if( x <= ios->clock) if (x <= ios->clock)
break; break;
} }
MMC_STR_STP_CLK |= STR_STP_CLK_ENABLE; /* enable controller */ MMC_STR_STP_CLK |= STR_STP_CLK_ENABLE; /* enable controller */
imxmci_stop_clock(host); imxmci_stop_clock(host);
MMC_CLK_RATE = (prescaler<<3) | clk; MMC_CLK_RATE = (prescaler << 3) | clk;
/* /*
* Under my understanding, clock should not be started there, because it would * Under my understanding, clock should not be started there, because it would
* initiate SDHC sequencer and send last or random command into card * initiate SDHC sequencer and send last or random command into card
*/ */
/*imxmci_start_clock(host);*/ /* imxmci_start_clock(host); */
dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE); dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE);
} else { } else {
@ -915,10 +896,10 @@ static void imxmci_check_status(unsigned long data)
tasklet_schedule(&host->tasklet); tasklet_schedule(&host->tasklet);
} }
if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) || if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) ||
test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
atomic_inc(&host->stuck_timeout); atomic_inc(&host->stuck_timeout);
if(atomic_read(&host->stuck_timeout) > 4) if (atomic_read(&host->stuck_timeout) > 4)
tasklet_schedule(&host->tasklet); tasklet_schedule(&host->tasklet);
} else { } else {
atomic_set(&host->stuck_timeout, 0); atomic_set(&host->stuck_timeout, 0);
@ -995,9 +976,9 @@ static int imxmci_probe(struct platform_device *pdev)
imxmci_softreset(); imxmci_softreset();
if ( MMC_REV_NO != 0x390 ) { if (MMC_REV_NO != 0x390) {
dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n",
MMC_REV_NO); MMC_REV_NO);
goto out; goto out;
} }
@ -1012,7 +993,7 @@ static int imxmci_probe(struct platform_device *pdev)
ret = -EBUSY; ret = -EBUSY;
goto out; goto out;
} }
host->dma_allocated=1; host->dma_allocated = 1;
imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host); imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host);
tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host); tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host);
@ -1032,7 +1013,7 @@ static int imxmci_probe(struct platform_device *pdev)
host->timer.data = (unsigned long)host; host->timer.data = (unsigned long)host;
host->timer.function = imxmci_check_status; host->timer.function = imxmci_check_status;
add_timer(&host->timer); add_timer(&host->timer);
mod_timer(&host->timer, jiffies + (HZ>>1)); mod_timer(&host->timer, jiffies + (HZ >> 1));
platform_set_drvdata(pdev, mmc); platform_set_drvdata(pdev, mmc);
@ -1042,9 +1023,9 @@ static int imxmci_probe(struct platform_device *pdev)
out: out:
if (host) { if (host) {
if(host->dma_allocated){ if (host->dma_allocated) {
imx_dma_free(host->dma); imx_dma_free(host->dma);
host->dma_allocated=0; host->dma_allocated = 0;
} }
if (host->clk) { if (host->clk) {
clk_disable(host->clk); clk_disable(host->clk);
@ -1072,9 +1053,9 @@ static int imxmci_remove(struct platform_device *pdev)
mmc_remove_host(mmc); mmc_remove_host(mmc);
free_irq(host->irq, host); free_irq(host->irq, host);
if(host->dma_allocated){ if (host->dma_allocated) {
imx_dma_free(host->dma); imx_dma_free(host->dma);
host->dma_allocated=0; host->dma_allocated = 0;
} }
tasklet_kill(&host->tasklet); tasklet_kill(&host->tasklet);
@ -1109,7 +1090,7 @@ static int imxmci_resume(struct platform_device *dev)
if (mmc) { if (mmc) {
host = mmc_priv(mmc); host = mmc_priv(mmc);
if(host) if (host)
set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events);
ret = mmc_resume_host(mmc); ret = mmc_resume_host(mmc);
} }